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This patch also fixes the assumption that the counters are disabled on the resume path. This is incorrect as the AMU counters are enabled early in the CPU reset function before `cpuamu_context_restore()` runs. Change-Id: I38a94eb166a523f00de18e86860434ffccff2131 Signed-off-by: Dimitris Papastamos <dimitris.papastamos@arm.com>
26 lines
669 B
C
26 lines
669 B
C
/*
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* Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <cortex_a75.h>
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#include <cpuamu.h>
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#include <pubsub_events.h>
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static void *cortex_a75_context_save(const void *arg)
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{
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if (midr_match(CORTEX_A75_MIDR))
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cpuamu_context_save(CORTEX_A75_AMU_NR_COUNTERS);
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return 0;
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}
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static void *cortex_a75_context_restore(const void *arg)
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{
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if (midr_match(CORTEX_A75_MIDR))
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cpuamu_context_restore(CORTEX_A75_AMU_NR_COUNTERS);
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return 0;
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}
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SUBSCRIBE_TO_EVENT(psci_suspend_pwrdown_start, cortex_a75_context_save);
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SUBSCRIBE_TO_EVENT(psci_suspend_pwrdown_finish, cortex_a75_context_restore);
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