Jeenu Viswambharan ef653d93cc AArch64: Refactor GP register restore to separate function ... At present, the function that restores general purpose registers also does ERET. Refactor the restore code to restore general purpose registers without ERET to complement the save function. The macro save_x18_to_x29_sp_el0 was used only once, and is therefore removed, and its contents expanded inline for readability. No functional changes, but with this patch: - The SMC return path will incur an branch-return and an additional register load. - The unknown SMC path restores registers x0 to x3. Change-Id: I7a1a63e17f34f9cde810685d70a0ad13ca3b7c50 Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>		2018-05-04 08:32:42 +01:00
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aarch64	AArch64: Refactor GP register restore to separate function	2018-05-04 08:32:42 +01:00
bl31.ld.S	Add comments about mismatched TCR_ELx and xlat tables	2018-02-27 09:55:01 +00:00
bl31.mk	Fixup SMCCC_ARCH_FEATURES semantics	2018-03-14 11:19:53 +00:00
bl31_context_mgmt.c	Suppress spurious deprecated declaration warnings	2018-03-01 16:14:29 +00:00
bl31_main.c	Fix MISRA rule 8.4 in common code	2018-02-28 17:18:46 +00:00
ehf.c	EHF: Introduce preempted return code parameter to ehf_allow_ns_preemption()	2018-02-27 13:46:33 +00:00
interrupt_mgmt.c	Use SPDX license identifiers	2017-05-03 09:39:28 +01:00