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Adjust the latest OP-TEE memory definitions to the newest TF-A baseline. Change-Id: Ib9c82b85f868adaf3c7285eb340486bda9c59c36 Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
70 lines
1.2 KiB
C
70 lines
1.2 KiB
C
/*
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* Copyright (C) 2018 Marvell International Ltd.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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* https://spdx.org/licenses
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*/
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#include <plat_marvell.h>
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/* MMU entry for internal (register) space access */
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#define MAP_DEVICE0 MAP_REGION_FLAT(DEVICE0_BASE, \
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DEVICE0_SIZE, \
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MT_DEVICE | MT_RW | MT_SECURE)
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/*
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* Table of regions for various BL stages to map using the MMU.
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*/
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#if IMAGE_BL1
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const mmap_region_t plat_marvell_mmap[] = {
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MARVELL_MAP_SECURE_RAM,
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MAP_DEVICE0,
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{0}
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};
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#endif
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#if IMAGE_BL2
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const mmap_region_t plat_marvell_mmap[] = {
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MARVELL_MAP_SECURE_RAM,
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MAP_DEVICE0,
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MARVELL_MAP_DRAM,
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#ifdef SPD_opteed
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MARVELL_MAP_OPTEE_CORE_MEM,
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MARVELL_OPTEE_PAGEABLE_LOAD_MEM,
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#endif
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{0}
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};
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#endif
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#if IMAGE_BL2U
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const mmap_region_t plat_marvell_mmap[] = {
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MARVELL_MAP_SECURE_RAM,
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MAP_DEVICE0,
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{0}
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};
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#endif
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#if IMAGE_BLE
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const mmap_region_t plat_marvell_mmap[] = {
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MAP_DEVICE0,
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{0}
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};
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#endif
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#if IMAGE_BL31
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const mmap_region_t plat_marvell_mmap[] = {
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MARVELL_MAP_SECURE_RAM,
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MAP_DEVICE0,
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MARVELL_MAP_DRAM,
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{0}
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};
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#endif
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#if IMAGE_BL32
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const mmap_region_t plat_marvell_mmap[] = {
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MARVELL_MAP_SECURE_RAM,
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MAP_DEVICE0,
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{0}
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};
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#endif
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MARVELL_CASSERT_MMAP;
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