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cedfa04ba5
ARMv8.4-TTST (Small Translation tables) relaxes the lower limit on the size of translation tables by increasing the maximum permitted value of the T1SZ and T0SZ fields in TCR_EL1, TCR_EL2, TCR_EL3, VTCR_EL2 and VSTCR_EL2. This feature is supported in AArch64 state only. This patch adds support for this feature to both versions of the translation tables library. It also removes the static build time checks for virtual address space size checks to runtime assertions. Change-Id: I4e8cebc197ec1c2092dc7d307486616786e6c093 Signed-off-by: Sathees Balya <sathees.balya@arm.com>
41 lines
1.1 KiB
C
41 lines
1.1 KiB
C
/*
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* Copyright (c) 2016-2018, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef XLAT_TABLES_PRIVATE_H
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#define XLAT_TABLES_PRIVATE_H
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#include <platform_def.h>
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#include <lib/cassert.h>
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#include <lib/xlat_tables/xlat_tables_arch.h>
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#if HW_ASSISTED_COHERENCY
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#error xlat tables v2 must be used with HW_ASSISTED_COHERENCY
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#endif
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CASSERT(CHECK_PHY_ADDR_SPACE_SIZE(PLAT_PHY_ADDR_SPACE_SIZE),
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assert_valid_phy_addr_space_size);
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/* Alias to retain compatibility with the old #define name */
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#define XLAT_BLOCK_LEVEL_MIN MIN_LVL_BLOCK_DESC
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void print_mmap(void);
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/* Returns the current Exception Level. The returned EL must be 1 or higher. */
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unsigned int xlat_arch_current_el(void);
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/*
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* Returns the bit mask that has to be ORed to the rest of a translation table
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* descriptor so that execution of code is prohibited at the given Exception
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* Level.
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*/
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uint64_t xlat_arch_get_xn_desc(unsigned int el);
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void init_xlation_table(uintptr_t base_va, uint64_t *table,
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unsigned int level, uintptr_t *max_va,
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unsigned long long *max_pa);
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#endif /* XLAT_TABLES_PRIVATE_H */
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