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https://github.com/ARM-software/arm-trusted-firmware.git
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003faaa59f
This patch adds support for passing FVP platform's topology configuration to DTS files for compilation, which allows to build DTBs with correct number of clusters and CPUs. This removes non-existing clusters/CPUs from the compiled device tree blob and fixes reported Linux errors when trying to power on absent CPUs/PEs. If DTS file is passed using FVP_HW_CONFIG_DTS build option from the platform's makefile, FVP_CLUSTER_COUNT, FVP_MAX_CPUS_PER_CLUSTER and FVP_MAX_PE_PER_CPU parameters are used, otherwise CI script will use the default values from the corresponding DTS file. Change-Id: Idcb45dc6ad5e3eaea18573aff1a01c9344404ab3 Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com>
155 lines
3.1 KiB
Text
155 lines
3.1 KiB
Text
/*
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* Copyright (c) 2013-2020, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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/* Configuration: 1 cluster with up to 4 CPUs */
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/dts-v1/;
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#define AFF
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#define CLUSTER_COUNT 1
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#include "fvp-defs.dtsi"
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/memreserve/ 0x80000000 0x00010000;
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/ {
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};
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/ {
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model = "FVP Foundation";
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compatible = "arm,fvp-base", "arm,vexpress";
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interrupt-parent = <&gic>;
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#address-cells = <2>;
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#size-cells = <2>;
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chosen { };
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aliases {
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serial0 = &v2m_serial0;
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serial1 = &v2m_serial1;
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serial2 = &v2m_serial2;
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serial3 = &v2m_serial3;
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};
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psci {
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compatible = "arm,psci-1.0", "arm,psci-0.2", "arm,psci";
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method = "smc";
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cpu_suspend = <0xc4000001>;
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cpu_off = <0x84000002>;
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cpu_on = <0xc4000003>;
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sys_poweroff = <0x84000008>;
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sys_reset = <0x84000009>;
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max-pwr-lvl = <2>;
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};
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cpus {
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#address-cells = <2>;
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#size-cells = <0>;
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CPU_MAP
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idle-states {
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entry-method = "arm,psci";
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CPU_SLEEP_0: cpu-sleep-0 {
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compatible = "arm,idle-state";
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local-timer-stop;
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arm,psci-suspend-param = <0x0010000>;
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entry-latency-us = <40>;
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exit-latency-us = <100>;
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min-residency-us = <150>;
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};
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CLUSTER_SLEEP_0: cluster-sleep-0 {
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compatible = "arm,idle-state";
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local-timer-stop;
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arm,psci-suspend-param = <0x1010000>;
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entry-latency-us = <500>;
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exit-latency-us = <1000>;
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min-residency-us = <2500>;
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};
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};
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CPUS
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L2_0: l2-cache0 {
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compatible = "cache";
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};
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};
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memory@80000000 {
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device_type = "memory";
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reg = <0x00000000 0x80000000 0 0x7F000000>,
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<0x00000008 0x80000000 0 0x80000000>;
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};
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gic: interrupt-controller@2f000000 {
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compatible = "arm,gic-v3";
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#interrupt-cells = <3>;
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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interrupt-controller;
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reg = <0x0 0x2f000000 0 0x10000>, // GICD
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<0x0 0x2f100000 0 0x200000>, // GICR
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<0x0 0x2c000000 0 0x2000>, // GICC
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<0x0 0x2c010000 0 0x2000>, // GICH
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<0x0 0x2c02f000 0 0x2000>; // GICV
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interrupts = <1 9 4>;
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its: its@2f020000 {
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compatible = "arm,gic-v3-its";
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msi-controller;
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reg = <0x0 0x2f020000 0x0 0x20000>; // GITS
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};
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};
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timer {
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compatible = "arm,armv8-timer";
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interrupts = <1 13 0xff01>,
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<1 14 0xff01>,
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<1 11 0xff01>,
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<1 10 0xff01>;
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clock-frequency = <100000000>;
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};
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timer@2a810000 {
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compatible = "arm,armv7-timer-mem";
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reg = <0x0 0x2a810000 0x0 0x10000>;
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clock-frequency = <100000000>;
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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frame@2a830000 {
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frame-number = <1>;
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interrupts = <0 26 4>;
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reg = <0x0 0x2a830000 0x0 0x10000>;
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};
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};
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pmu {
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compatible = "arm,armv8-pmuv3";
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interrupts = <0 60 4>,
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<0 61 4>,
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<0 62 4>,
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<0 63 4>;
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};
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smb {
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compatible = "simple-bus";
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#address-cells = <2>;
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#size-cells = <1>;
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ranges = <0 0 0 0x08000000 0x04000000>,
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<1 0 0 0x14000000 0x04000000>,
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<2 0 0 0x18000000 0x04000000>,
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<3 0 0 0x1c000000 0x04000000>,
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<4 0 0 0x0c000000 0x04000000>,
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<5 0 0 0x10000000 0x04000000>;
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#include "fvp-foundation-motherboard.dtsi"
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};
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};
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