mirror of
https://github.com/ARM-software/arm-trusted-firmware.git
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c67703ebaa
Now that QoS drivers are cleaned up , move them out of staging. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Change-Id: If61ab2157c30b8f5a6b91d2c56ddbb9098ef99e8
111 lines
3 KiB
C
111 lines
3 KiB
C
/*
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* Copyright (c) 2015-2019, Renesas Electronics Corporation
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* All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <stdint.h>
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#include <common/debug.h>
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#include "../qos_common.h"
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#include "../qos_reg.h"
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#include "qos_init_v3m.h"
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#define RCAR_QOS_VERSION "rev.0.01"
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#include "qos_init_v3m_mstat.h"
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struct rcar_gen3_dbsc_qos_settings v3m_qos[] = {
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/* BUFCAM settings */
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{ DBSC_DBCAM0CNF1, 0x00044218 },
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{ DBSC_DBCAM0CNF2, 0x000000F4 },
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{ DBSC_DBSCHCNT0, 0x080F003F },
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{ DBSC_DBSCHCNT1, 0x00001010 },
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{ DBSC_DBSCHSZ0, 0x00000001 },
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{ DBSC_DBSCHRW0, 0x22421111 },
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{ DBSC_DBSCHRW1, 0x00180034 },
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{ DBSC_SCFCTST0, 0x180B1708 },
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{ DBSC_SCFCTST1, 0x0808070C },
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{ DBSC_SCFCTST2, 0x012F1123 },
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/* QoS Settings */
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{ DBSC_DBSCHQOS00, 0x0000F000 },
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{ DBSC_DBSCHQOS01, 0x0000E000 },
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{ DBSC_DBSCHQOS02, 0x00007000 },
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{ DBSC_DBSCHQOS03, 0x00000000 },
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{ DBSC_DBSCHQOS40, 0x0000F000 },
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{ DBSC_DBSCHQOS41, 0x0000EFFF },
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{ DBSC_DBSCHQOS42, 0x0000B000 },
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{ DBSC_DBSCHQOS43, 0x00000000 },
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{ DBSC_DBSCHQOS90, 0x0000F000 },
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{ DBSC_DBSCHQOS91, 0x0000EFFF },
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{ DBSC_DBSCHQOS92, 0x0000D000 },
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{ DBSC_DBSCHQOS93, 0x00000000 },
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{ DBSC_DBSCHQOS130, 0x0000F000 },
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{ DBSC_DBSCHQOS131, 0x0000EFFF },
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{ DBSC_DBSCHQOS132, 0x0000E800 },
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{ DBSC_DBSCHQOS133, 0x00007000 },
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{ DBSC_DBSCHQOS140, 0x0000F000 },
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{ DBSC_DBSCHQOS141, 0x0000EFFF },
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{ DBSC_DBSCHQOS142, 0x0000E800 },
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{ DBSC_DBSCHQOS143, 0x0000B000 },
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{ DBSC_DBSCHQOS150, 0x000007D0 },
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{ DBSC_DBSCHQOS151, 0x000007CF },
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{ DBSC_DBSCHQOS152, 0x000005D0 },
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{ DBSC_DBSCHQOS153, 0x000003D0 },
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};
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void qos_init_v3m(void)
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{
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return;
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rcar_qos_dbsc_setting(v3m_qos, ARRAY_SIZE(v3m_qos), false);
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#if !(RCAR_QOS_TYPE == RCAR_QOS_NONE)
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#if RCAR_QOS_TYPE == RCAR_QOS_TYPE_DEFAULT
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NOTICE("BL2: QoS is default setting(%s)\n", RCAR_QOS_VERSION);
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#endif
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/* Resource Alloc setting */
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io_write_32(QOSCTRL_RAS, 0x00000020U);
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io_write_32(QOSCTRL_FIXTH, 0x000F0005U);
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io_write_32(QOSCTRL_REGGD, 0x00000004U);
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io_write_64(QOSCTRL_DANN, 0x0202020104040200U);
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io_write_32(QOSCTRL_DANT, 0x00201008U);
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io_write_32(QOSCTRL_EC, 0x00080001U); /* need for H3 ES1 */
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io_write_64(QOSCTRL_EMS, 0x0000000000000000U);
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io_write_32(QOSCTRL_INSFC, 0x63C20001U);
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io_write_32(QOSCTRL_BERR, 0x00000000U);
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/* QOSBW setting */
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io_write_32(QOSCTRL_SL_INIT, 0x0305007DU);
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io_write_32(QOSCTRL_REF_ARS, 0x00330000U);
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/* QOSBW SRAM setting */
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uint32_t i;
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for (i = 0U; i < ARRAY_SIZE(mstat_fix); i++) {
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io_write_64(QOSBW_FIX_QOS_BANK0 + i * 8, mstat_fix[i]);
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io_write_64(QOSBW_FIX_QOS_BANK1 + i * 8, mstat_fix[i]);
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}
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for (i = 0U; i < ARRAY_SIZE(mstat_be); i++) {
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io_write_64(QOSBW_BE_QOS_BANK0 + i * 8, mstat_be[i]);
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io_write_64(QOSBW_BE_QOS_BANK1 + i * 8, mstat_be[i]);
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}
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/* AXI-IF arbitration setting */
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io_write_32(DBSC_AXARB, 0x18010000U);
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/* Resource Alloc start */
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io_write_32(QOSCTRL_RAEN, 0x00000001U);
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/* QOSBW start */
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io_write_32(QOSCTRL_STATQC, 0x00000001U);
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#else
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NOTICE("BL2: QoS is None\n");
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#endif /* !(RCAR_QOS_TYPE == RCAR_QOS_NONE) */
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}
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