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https://github.com/ARM-software/arm-trusted-firmware.git
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ed108b5605
This patch provides the following features and makes modifications listed below: - Individual APIAKey key generation for each CPU. - New key generation on every BL31 warm boot and TSP CPU On event. - Per-CPU storage of APIAKey added in percpu_data[] of cpu_data structure. - `plat_init_apiakey()` function replaced with `plat_init_apkey()` which returns 128-bit value and uses Generic timer physical counter value to increase the randomness of the generated key. The new function can be used for generation of all ARMv8.3-PAuth keys - ARMv8.3-PAuth specific code placed in `lib\extensions\pauth`. - New `pauth_init_enable_el1()` and `pauth_init_enable_el3()` functions generate, program and enable APIAKey_EL1 for EL1 and EL3 respectively; pauth_disable_el1()` and `pauth_disable_el3()` functions disable PAuth for EL1 and EL3 respectively; `pauth_load_bl31_apiakey()` loads saved per-CPU APIAKey_EL1 from cpu-data structure. - Combined `save_gp_pauth_registers()` function replaces calls to `save_gp_registers()` and `pauth_context_save()`; `restore_gp_pauth_registers()` replaces `pauth_context_restore()` and `restore_gp_registers()` calls. - `restore_gp_registers_eret()` function removed with corresponding code placed in `el3_exit()`. - Fixed the issue when `pauth_t pauth_ctx` structure allocated space for 12 uint64_t PAuth registers instead of 10 by removal of macro CTX_PACGAKEY_END from `include/lib/el3_runtime/aarch64/context.h` and assigning its value to CTX_PAUTH_REGS_END. - Use of MODE_SP_ELX and MODE_SP_EL0 macro definitions in `msr spsel` instruction instead of hard-coded values. - Changes in documentation related to ARMv8.3-PAuth and ARMv8.5-BTI. Change-Id: Id18b81cc46f52a783a7e6a09b9f149b6ce803211 Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com>
138 lines
3.8 KiB
C
138 lines
3.8 KiB
C
/*
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* Copyright (c) 2013-2019, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <assert.h>
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#include <arch_helpers.h>
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#include <arch_features.h>
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#include <bl1/bl1.h>
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#include <bl2/bl2.h>
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#include <common/bl_common.h>
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#include <common/debug.h>
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#include <drivers/auth/auth_mod.h>
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#include <drivers/console.h>
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#include <lib/extensions/pauth.h>
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#include <plat/common/platform.h>
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#include "bl2_private.h"
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#ifdef __aarch64__
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#define NEXT_IMAGE "BL31"
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#else
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#define NEXT_IMAGE "BL32"
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#endif
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#if !BL2_AT_EL3
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/*******************************************************************************
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* Setup function for BL2.
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******************************************************************************/
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void bl2_setup(u_register_t arg0, u_register_t arg1, u_register_t arg2,
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u_register_t arg3)
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{
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/* Perform early platform-specific setup */
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bl2_early_platform_setup2(arg0, arg1, arg2, arg3);
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/* Perform late platform-specific setup */
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bl2_plat_arch_setup();
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#if CTX_INCLUDE_PAUTH_REGS
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/*
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* Assert that the ARMv8.3-PAuth registers are present or an access
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* fault will be triggered when they are being saved or restored.
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*/
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assert(is_armv8_3_pauth_present());
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#endif /* CTX_INCLUDE_PAUTH_REGS */
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}
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#else /* if BL2_AT_EL3 */
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/*******************************************************************************
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* Setup function for BL2 when BL2_AT_EL3=1.
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******************************************************************************/
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void bl2_el3_setup(u_register_t arg0, u_register_t arg1, u_register_t arg2,
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u_register_t arg3)
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{
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/* Perform early platform-specific setup */
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bl2_el3_early_platform_setup(arg0, arg1, arg2, arg3);
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/* Perform late platform-specific setup */
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bl2_el3_plat_arch_setup();
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#if CTX_INCLUDE_PAUTH_REGS
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/*
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* Assert that the ARMv8.3-PAuth registers are present or an access
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* fault will be triggered when they are being saved or restored.
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*/
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assert(is_armv8_3_pauth_present());
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#endif /* CTX_INCLUDE_PAUTH_REGS */
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}
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#endif /* BL2_AT_EL3 */
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/*******************************************************************************
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* The only thing to do in BL2 is to load further images and pass control to
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* next BL. The memory occupied by BL2 will be reclaimed by BL3x stages. BL2
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* runs entirely in S-EL1.
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******************************************************************************/
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void bl2_main(void)
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{
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entry_point_info_t *next_bl_ep_info;
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NOTICE("BL2: %s\n", version_string);
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NOTICE("BL2: %s\n", build_message);
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/* Perform remaining generic architectural setup in S-EL1 */
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bl2_arch_setup();
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#if TRUSTED_BOARD_BOOT
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/* Initialize authentication module */
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auth_mod_init();
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#endif /* TRUSTED_BOARD_BOOT */
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/* initialize boot source */
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bl2_plat_preload_setup();
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/* Load the subsequent bootloader images. */
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next_bl_ep_info = bl2_load_images();
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#if !BL2_AT_EL3
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#ifndef __aarch64__
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/*
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* For AArch32 state BL1 and BL2 share the MMU setup.
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* Given that BL2 does not map BL1 regions, MMU needs
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* to be disabled in order to go back to BL1.
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*/
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disable_mmu_icache_secure();
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#endif /* !__aarch64__ */
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console_flush();
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#if ENABLE_PAUTH
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/*
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* Disable pointer authentication before running next boot image
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*/
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pauth_disable_el1();
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#endif /* ENABLE_PAUTH */
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/*
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* Run next BL image via an SMC to BL1. Information on how to pass
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* control to the BL32 (if present) and BL33 software images will
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* be passed to next BL image as an argument.
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*/
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smc(BL1_SMC_RUN_IMAGE, (unsigned long)next_bl_ep_info, 0, 0, 0, 0, 0, 0);
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#else /* if BL2_AT_EL3 */
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NOTICE("BL2: Booting " NEXT_IMAGE "\n");
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print_entry_point_info(next_bl_ep_info);
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console_flush();
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#if ENABLE_PAUTH
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/*
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* Disable pointer authentication before running next boot image
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*/
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pauth_disable_el3();
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#endif /* ENABLE_PAUTH */
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bl2_run_next_image(next_bl_ep_info);
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#endif /* BL2_AT_EL3 */
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}
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