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This patch disables trapping to EL3 when the FEAT_D128 specific registers are accessed by setting the SCR_EL3.D128En bit. If FEAT_D128 is implemented, then FEAT_SYSREG128 is implemented. With FEAT_SYSREG128 certain system registers are treated as 128-bit, so we should be context saving and restoring 128-bits instead of 64-bit when FEAT_D128 is enabled. FEAT_SYSREG128 adds support for MRRS and MSRR instruction which helps us to read write to 128-bit system register. Refer to Arm Architecture Manual for further details. Change the FVP platform to default to handling this as a dynamic option so the right decision can be made by the code at runtime. Change-Id: I1a53db5eac29e56c8fbdcd4961ede3abfcb2411a Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com> Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>
36 lines
714 B
C
36 lines
714 B
C
/*
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* Copyright (c) 2024, Arm Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef SYSREG128_H
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#define SYSREG128_H
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#ifndef __ASSEMBLER__
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#if ENABLE_FEAT_D128
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#include <stdint.h>
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typedef uint128_t sysreg_t;
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#define PAR_EL1_D128 (((sysreg_t)(1ULL)) << (64))
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#define _DECLARE_SYSREG128_READ_FUNC(_name) \
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uint128_t read_ ## _name(void);
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#define _DECLARE_SYSREG128_WRITE_FUNC(_name) \
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void write_ ## _name(uint128_t v);
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#define DECLARE_SYSREG128_RW_FUNCS(_name) \
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_DECLARE_SYSREG128_READ_FUNC(_name) \
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_DECLARE_SYSREG128_WRITE_FUNC(_name)
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#else
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typedef uint64_t sysreg_t;
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#endif /* ENABLE_FEAT_D128 */
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#endif /* __ASSEMBLER__ */
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#endif /* SYSREG128_H */
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