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ebe82a392f
When an external RMM is not provided during make invocation, include the Test Realm Payload (TRP) to the FIP. Change-Id: I15d396cf268a08d79da63075aadb4172238eb225 Signed-off-by: Jean-Philippe Brucker <jean-philippe@linaro.org>
281 lines
6.3 KiB
C
281 lines
6.3 KiB
C
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/*
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* Copyright (c) 2015-2024, Arm Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <platform_def.h>
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#include <arch_helpers.h>
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#include <common/bl_common.h>
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#include <lib/xlat_tables/xlat_tables_v2.h>
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#include <services/el3_spmc_ffa_memory.h>
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#if ENABLE_RME
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#include <services/rmm_core_manifest.h>
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#endif
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#include <plat/common/platform.h>
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#include "qemu_private.h"
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#define MAP_DEVICE0 MAP_REGION_FLAT(DEVICE0_BASE, \
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DEVICE0_SIZE, \
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MT_DEVICE | MT_RW | EL3_PAS)
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#ifdef DEVICE1_BASE
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#define MAP_DEVICE1 MAP_REGION_FLAT(DEVICE1_BASE, \
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DEVICE1_SIZE, \
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MT_DEVICE | MT_RW | EL3_PAS)
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#endif
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#ifdef DEVICE2_BASE
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#define MAP_DEVICE2 MAP_REGION_FLAT(DEVICE2_BASE, \
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DEVICE2_SIZE, \
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MT_DEVICE | MT_RW | EL3_PAS)
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#endif
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#define MAP_SHARED_RAM MAP_REGION_FLAT(SHARED_RAM_BASE, \
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SHARED_RAM_SIZE, \
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MT_DEVICE | MT_RW | EL3_PAS)
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#define MAP_BL32_MEM MAP_REGION_FLAT(BL32_MEM_BASE, BL32_MEM_SIZE, \
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MT_MEMORY | MT_RW | EL3_PAS)
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#define MAP_NS_DRAM0 MAP_REGION_FLAT(NS_DRAM0_BASE, NS_DRAM0_SIZE, \
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MT_MEMORY | MT_RW | MT_NS)
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#define MAP_FLASH0 MAP_REGION_FLAT(QEMU_FLASH0_BASE, QEMU_FLASH0_SIZE, \
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MT_MEMORY | MT_RO | EL3_PAS)
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#define MAP_FLASH1 MAP_REGION_FLAT(QEMU_FLASH1_BASE, QEMU_FLASH1_SIZE, \
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MT_MEMORY | MT_RO | EL3_PAS)
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#ifdef FW_HANDOFF_BASE
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#define MAP_FW_HANDOFF MAP_REGION_FLAT(FW_HANDOFF_BASE, FW_HANDOFF_SIZE, \
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MT_MEMORY | MT_RW | EL3_PAS)
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#endif
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#ifdef FW_NS_HANDOFF_BASE
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#define MAP_FW_NS_HANDOFF MAP_REGION_FLAT(FW_NS_HANDOFF_BASE, FW_HANDOFF_SIZE, \
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MT_MEMORY | MT_RW | MT_NS)
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#endif
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/*
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* Table of regions for various BL stages to map using the MMU.
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* This doesn't include TZRAM as the 'mem_layout' argument passed to
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* arm_configure_mmu_elx() will give the available subset of that,
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*/
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#ifdef IMAGE_BL1
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static const mmap_region_t plat_qemu_mmap[] = {
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MAP_FLASH0,
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MAP_FLASH1,
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MAP_SHARED_RAM,
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MAP_DEVICE0,
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#ifdef MAP_DEVICE1
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MAP_DEVICE1,
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#endif
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#ifdef MAP_DEVICE2
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MAP_DEVICE2,
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#endif
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{0}
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};
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#endif
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#ifdef IMAGE_BL2
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static const mmap_region_t plat_qemu_mmap[] = {
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MAP_FLASH0,
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MAP_FLASH1,
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MAP_SHARED_RAM,
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MAP_DEVICE0,
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#ifdef MAP_DEVICE1
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MAP_DEVICE1,
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#endif
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#ifdef MAP_DEVICE2
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MAP_DEVICE2,
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#endif
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MAP_NS_DRAM0,
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#if SPM_MM
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QEMU_SP_IMAGE_MMAP,
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#else
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MAP_BL32_MEM,
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#endif
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#ifdef MAP_FW_HANDOFF
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MAP_FW_HANDOFF,
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#endif
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{0}
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};
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#endif
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#ifdef IMAGE_BL31
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static const mmap_region_t plat_qemu_mmap[] = {
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MAP_SHARED_RAM,
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MAP_DEVICE0,
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#ifdef MAP_DEVICE1
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MAP_DEVICE1,
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#endif
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#ifdef MAP_DEVICE2
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MAP_DEVICE2,
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#endif
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#ifdef MAP_FW_HANDOFF
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MAP_FW_HANDOFF,
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#endif
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#ifdef MAP_FW_NS_HANDOFF
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MAP_FW_NS_HANDOFF,
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#endif
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#if SPM_MM
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MAP_NS_DRAM0,
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QEMU_SPM_BUF_EL3_MMAP,
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#elif !SPMC_AT_EL3
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MAP_BL32_MEM,
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#endif
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{0}
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};
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#endif
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#ifdef IMAGE_BL32
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static const mmap_region_t plat_qemu_mmap[] = {
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MAP_SHARED_RAM,
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MAP_DEVICE0,
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#ifdef MAP_DEVICE1
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MAP_DEVICE1,
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#endif
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#ifdef MAP_DEVICE2
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MAP_DEVICE2,
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#endif
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{0}
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};
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#endif
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#ifdef IMAGE_RMM
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const mmap_region_t plat_qemu_mmap[] = {
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MAP_DEVICE0,
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#ifdef MAP_DEVICE1
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MAP_DEVICE1,
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#endif
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#ifdef MAP_DEVICE2
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MAP_DEVICE2,
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#endif
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{0}
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};
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#endif
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/*******************************************************************************
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* Returns QEMU platform specific memory map regions.
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******************************************************************************/
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const mmap_region_t *plat_qemu_get_mmap(void)
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{
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return plat_qemu_mmap;
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}
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#if MEASURED_BOOT || TRUSTED_BOARD_BOOT
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int plat_get_mbedtls_heap(void **heap_addr, size_t *heap_size)
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{
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return get_mbedtls_heap_helper(heap_addr, heap_size);
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}
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#endif
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#if SPMC_AT_EL3
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/*
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* When using the EL3 SPMC implementation allocate the datastore
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* for tracking shared memory descriptors in normal memory.
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*/
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#define PLAT_SPMC_SHMEM_DATASTORE_SIZE 64 * 1024
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uint8_t plat_spmc_shmem_datastore[PLAT_SPMC_SHMEM_DATASTORE_SIZE];
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int plat_spmc_shmem_datastore_get(uint8_t **datastore, size_t *size)
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{
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*datastore = plat_spmc_shmem_datastore;
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*size = PLAT_SPMC_SHMEM_DATASTORE_SIZE;
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return 0;
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}
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int plat_spmc_shmem_begin(struct ffa_mtd *desc)
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{
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return 0;
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}
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int plat_spmc_shmem_reclaim(struct ffa_mtd *desc)
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{
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return 0;
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}
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#endif
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#if defined(SPD_spmd) && (SPMC_AT_EL3 == 0)
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/*
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* A dummy implementation of the platform handler for Group0 secure interrupt.
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*/
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int plat_spmd_handle_group0_interrupt(uint32_t intid)
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{
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(void)intid;
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return -1;
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}
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#endif /*defined(SPD_spmd) && (SPMC_AT_EL3 == 0)*/
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#if ENABLE_RME
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/*
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* Get a pointer to the RMM-EL3 Shared buffer and return it
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* through the pointer passed as parameter.
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*
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* This function returns the size of the shared buffer.
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*/
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size_t plat_rmmd_get_el3_rmm_shared_mem(uintptr_t *shared)
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{
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*shared = (uintptr_t)RMM_SHARED_BASE;
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return (size_t)RMM_SHARED_SIZE;
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}
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int plat_rmmd_load_manifest(struct rmm_manifest *manifest)
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{
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uint64_t checksum;
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uintptr_t base;
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uint64_t size;
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struct ns_dram_bank *bank_ptr;
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assert(manifest != NULL);
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manifest->version = RMMD_MANIFEST_VERSION;
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manifest->padding = 0U; /* RES0 */
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manifest->plat_data = (uintptr_t)NULL;
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manifest->plat_dram.num_banks = 1;
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/*
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* Array ns_dram_banks[] follows ns_dram_info structure:
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*
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* +-----------------------------------+
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* | offset | field | comment |
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* +----------+-----------+------------+
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* | 0 | version | 0x00000002 |
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* +----------+-----------+------------+
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* | 4 | padding | 0x00000000 |
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* +----------+-----------+------------+
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* | 8 | plat_data | NULL |
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* +----------+-----------+------------+
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* | 16 | num_banks | |
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* +----------+-----------+ |
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* | 24 | banks | plat_dram |
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* +----------+-----------+ |
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* | 32 | checksum | |
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* +----------+-----------+------------+
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* | 40 | base 0 | |
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* +----------+-----------+ bank[0] |
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* | 48 | size 0 | |
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* +----------+-----------+------------+
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*/
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bank_ptr = (struct ns_dram_bank *)
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((uintptr_t)&manifest->plat_dram.checksum +
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sizeof(manifest->plat_dram.checksum));
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manifest->plat_dram.banks = bank_ptr;
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/* Calculate checksum of plat_dram structure */
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checksum = 1 + (uint64_t)bank_ptr;
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base = NS_DRAM0_BASE;
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size = NS_DRAM0_SIZE;
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bank_ptr[0].base = base;
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bank_ptr[0].size = size;
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checksum += base + size;
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/* Checksum must be 0 */
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manifest->plat_dram.checksum = ~checksum + 1UL;
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return 0;
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}
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#endif /* ENABLE_RME */
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