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https://github.com/ARM-software/arm-trusted-firmware.git
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461c0a5d92
Currently, EL3 context registers are duplicated per-world per-cpu. Some registers have the same value across all CPUs, so this patch moves these registers out into a per-world context to reduce memory usage. Change-Id: I91294e3d5f4af21a58c23599af2bdbd2a747c54a Signed-off-by: Elizabeth Ho <elizabeth.ho@arm.com> Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com>
72 lines
1.4 KiB
C
72 lines
1.4 KiB
C
/*
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* Copyright (c) 2017-2023, Arm Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef AMU_H
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#define AMU_H
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#include <stdbool.h>
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#include <stdint.h>
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#include <context.h>
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#include <platform_def.h>
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#if ENABLE_FEAT_AMU
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#if __aarch64__
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void amu_enable(cpu_context_t *ctx);
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void amu_init_el3(void);
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void amu_init_el2_unused(void);
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void amu_enable_per_world(per_world_context_t *per_world_ctx);
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#else
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void amu_enable(bool el2_unused);
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#endif /* __aarch64__ */
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#else
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#if __aarch64__
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void amu_enable(cpu_context_t *ctx)
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{
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}
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void amu_init_el3(void)
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{
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}
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void amu_init_el2_unused(void)
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{
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}
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void amu_enable_per_world(per_world_context_t *per_world_ctx)
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{
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}
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#else
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static inline void amu_enable(bool el2_unused)
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{
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}
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#endif /*__aarch64__ */
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#endif /* ENABLE_FEAT_AMU */
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#if ENABLE_AMU_AUXILIARY_COUNTERS
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/*
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* AMU data for a single core.
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*/
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struct amu_core {
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uint16_t enable; /* Mask of auxiliary counters to enable */
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};
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/*
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* Topological platform data specific to the AMU.
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*/
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struct amu_topology {
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struct amu_core cores[PLATFORM_CORE_COUNT]; /* Per-core data */
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};
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#if !ENABLE_AMU_FCONF
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/*
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* Retrieve the platform's AMU topology. A `NULL` return value is treated as a
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* non-fatal error, in which case no auxiliary counters will be enabled.
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*/
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const struct amu_topology *plat_amu_topology(void);
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#endif /* ENABLE_AMU_FCONF */
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#endif /* ENABLE_AMU_AUXILIARY_COUNTERS */
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#endif /* AMU_H */
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