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https://github.com/ARM-software/arm-trusted-firmware.git
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e829a3796f
BL31 is running out of space, and the use-case of SPM doesn't require it to be in SRAM. To prevent BL31 from running out of space in the future, move BL31 to DRAM if SPM is enabled. Secure Partition Manager design document updated to reflect the changes. Increased the size of the stack of BL31 for builds with SPM. The translation tables used by SPM in Arm platforms have been moved back to the 'xlat_tables' region instead of 'arm_el3_tzc_dram'. Everything is in DRAM now, so it doesn't make sense to treat them in a different way. Change-Id: Ia6136c8e108b8da9edd90e9d72763dada5e5e5dc Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
216 lines
6.4 KiB
Makefile
216 lines
6.4 KiB
Makefile
#
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# Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved.
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#
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# SPDX-License-Identifier: BSD-3-Clause
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#
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# Use the GICv3 driver on the FVP by default
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FVP_USE_GIC_DRIVER := FVP_GICV3
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# Use the SP804 timer instead of the generic one
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FVP_USE_SP804_TIMER := 0
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# Default cluster count for FVP
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FVP_CLUSTER_COUNT := 2
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# Default number of CPUs per cluster on FVP
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FVP_MAX_CPUS_PER_CLUSTER := 4
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# Default number of threads per CPU on FVP
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FVP_MAX_PE_PER_CPU := 1
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FVP_DT_PREFIX := fvp-base-gicv3-psci
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$(eval $(call assert_boolean,FVP_USE_SP804_TIMER))
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$(eval $(call add_define,FVP_USE_SP804_TIMER))
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# The FVP platform depends on this macro to build with correct GIC driver.
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$(eval $(call add_define,FVP_USE_GIC_DRIVER))
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# Pass FVP_CLUSTER_COUNT to the build system.
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$(eval $(call add_define,FVP_CLUSTER_COUNT))
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# Pass FVP_MAX_CPUS_PER_CLUSTER to the build system.
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$(eval $(call add_define,FVP_MAX_CPUS_PER_CLUSTER))
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# Pass FVP_MAX_PE_PER_CPU to the build system.
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$(eval $(call add_define,FVP_MAX_PE_PER_CPU))
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# Sanity check the cluster count and if FVP_CLUSTER_COUNT <= 2,
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# choose the CCI driver , else the CCN driver
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ifeq ($(FVP_CLUSTER_COUNT), 0)
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$(error "Incorrect cluster count specified for FVP port")
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else ifeq ($(FVP_CLUSTER_COUNT),$(filter $(FVP_CLUSTER_COUNT),1 2))
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FVP_INTERCONNECT_DRIVER := FVP_CCI
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else
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FVP_INTERCONNECT_DRIVER := FVP_CCN
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endif
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$(eval $(call add_define,FVP_INTERCONNECT_DRIVER))
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FVP_GICV3_SOURCES := drivers/arm/gic/common/gic_common.c \
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drivers/arm/gic/v3/gicv3_main.c \
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drivers/arm/gic/v3/gicv3_helpers.c \
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plat/common/plat_gicv3.c \
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plat/arm/common/arm_gicv3.c
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# Choose the GIC sources depending upon the how the FVP will be invoked
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ifeq (${FVP_USE_GIC_DRIVER}, FVP_GICV3)
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FVP_GIC_SOURCES := ${FVP_GICV3_SOURCES} \
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drivers/arm/gic/v3/gic500.c
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else ifeq (${FVP_USE_GIC_DRIVER},FVP_GIC600)
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FVP_GIC_SOURCES := ${FVP_GICV3_SOURCES} \
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drivers/arm/gic/v3/gic600.c
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else ifeq (${FVP_USE_GIC_DRIVER}, FVP_GICV2)
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FVP_GIC_SOURCES := drivers/arm/gic/common/gic_common.c \
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drivers/arm/gic/v2/gicv2_main.c \
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drivers/arm/gic/v2/gicv2_helpers.c \
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plat/common/plat_gicv2.c \
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plat/arm/common/arm_gicv2.c
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FVP_DT_PREFIX := fvp-base-gicv2-psci
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else ifeq (${FVP_USE_GIC_DRIVER}, FVP_GICV3_LEGACY)
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ifeq (${ARCH}, aarch32)
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$(error "GICV3 Legacy driver not supported for AArch32 build")
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endif
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FVP_GIC_SOURCES := drivers/arm/gic/arm_gic.c \
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drivers/arm/gic/gic_v2.c \
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drivers/arm/gic/gic_v3.c \
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plat/common/plat_gic.c \
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plat/arm/common/arm_gicv3_legacy.c
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FVP_DT_PREFIX := fvp-base-gicv2-psci
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else
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$(error "Incorrect GIC driver chosen on FVP port")
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endif
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ifeq (${FVP_INTERCONNECT_DRIVER}, FVP_CCI)
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FVP_INTERCONNECT_SOURCES := drivers/arm/cci/cci.c
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else ifeq (${FVP_INTERCONNECT_DRIVER}, FVP_CCN)
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FVP_INTERCONNECT_SOURCES := drivers/arm/ccn/ccn.c \
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plat/arm/common/arm_ccn.c
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else
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$(error "Incorrect CCN driver chosen on FVP port")
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endif
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FVP_SECURITY_SOURCES := drivers/arm/tzc/tzc400.c \
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plat/arm/board/fvp/fvp_security.c \
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plat/arm/common/arm_tzc400.c
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PLAT_INCLUDES := -Iplat/arm/board/fvp/include
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PLAT_BL_COMMON_SOURCES := plat/arm/board/fvp/fvp_common.c
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FVP_CPU_LIBS := lib/cpus/${ARCH}/aem_generic.S
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ifeq (${ARCH}, aarch64)
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FVP_CPU_LIBS += lib/cpus/aarch64/cortex_a35.S \
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lib/cpus/aarch64/cortex_a53.S \
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lib/cpus/aarch64/cortex_a55.S \
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lib/cpus/aarch64/cortex_a57.S \
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lib/cpus/aarch64/cortex_a72.S \
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lib/cpus/aarch64/cortex_a73.S \
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lib/cpus/aarch64/cortex_a75.S
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else
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FVP_CPU_LIBS += lib/cpus/aarch32/cortex_a32.S
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endif
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BL1_SOURCES += drivers/io/io_semihosting.c \
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lib/semihosting/semihosting.c \
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lib/semihosting/${ARCH}/semihosting_call.S \
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plat/arm/board/fvp/${ARCH}/fvp_helpers.S \
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plat/arm/board/fvp/fvp_bl1_setup.c \
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plat/arm/board/fvp/fvp_io_storage.c \
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plat/arm/board/fvp/fvp_trusted_boot.c \
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${FVP_CPU_LIBS} \
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${FVP_INTERCONNECT_SOURCES}
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BL2_SOURCES += drivers/io/io_semihosting.c \
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lib/semihosting/semihosting.c \
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lib/semihosting/${ARCH}/semihosting_call.S \
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plat/arm/board/fvp/fvp_bl2_setup.c \
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plat/arm/board/fvp/fvp_io_storage.c \
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plat/arm/board/fvp/fvp_trusted_boot.c \
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${FVP_SECURITY_SOURCES}
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ifeq (${BL2_AT_EL3},1)
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BL2_SOURCES += plat/arm/board/fvp/${ARCH}/fvp_helpers.S \
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plat/arm/board/fvp/fvp_bl2_el3_setup.c \
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${FVP_CPU_LIBS} \
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${FVP_INTERCONNECT_SOURCES}
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endif
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ifeq (${FVP_USE_SP804_TIMER},1)
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BL2_SOURCES += drivers/arm/sp804/sp804_delay_timer.c
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endif
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BL2U_SOURCES += plat/arm/board/fvp/fvp_bl2u_setup.c \
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${FVP_SECURITY_SOURCES}
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BL31_SOURCES += drivers/arm/smmu/smmu_v3.c \
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plat/arm/board/fvp/fvp_bl31_setup.c \
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plat/arm/board/fvp/fvp_pm.c \
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plat/arm/board/fvp/fvp_topology.c \
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plat/arm/board/fvp/aarch64/fvp_helpers.S \
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plat/arm/board/fvp/drivers/pwrc/fvp_pwrc.c \
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${FVP_CPU_LIBS} \
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${FVP_GIC_SOURCES} \
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${FVP_INTERCONNECT_SOURCES} \
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${FVP_SECURITY_SOURCES}
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# Add the FDT_SOURCES and options for Dynamic Config (only for Unix env)
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ifdef UNIX_MK
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FVP_HW_CONFIG_DTS := fdts/${FVP_DT_PREFIX}.dts
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FDT_SOURCES += plat/arm/board/fvp/fdts/${PLAT}_tb_fw_config.dts
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FVP_TB_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_tb_fw_config.dtb
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# Add the TB_FW_CONFIG to FIP and specify the same to certtool
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$(eval $(call TOOL_ADD_PAYLOAD,${FVP_TB_FW_CONFIG},--tb-fw-config))
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FDT_SOURCES += ${FVP_HW_CONFIG_DTS}
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$(eval FVP_HW_CONFIG := ${BUILD_PLAT}/$(patsubst %.dts,%.dtb,$(FVP_HW_CONFIG_DTS)))
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# Add the HW_CONFIG to FIP and specify the same to certtool
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$(eval $(call TOOL_ADD_PAYLOAD,${FVP_HW_CONFIG},--hw-config))
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endif
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# Disable the PSCI platform compatibility layer
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ENABLE_PLAT_COMPAT := 0
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# Enable Activity Monitor Unit extensions by default
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ENABLE_AMU := 1
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ifeq (${ENABLE_AMU},1)
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BL31_SOURCES += lib/cpus/aarch64/cortex_a75_pubsub.c \
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lib/cpus/aarch64/cpuamu.c \
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lib/cpus/aarch64/cpuamu_helpers.S
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endif
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ifneq (${ENABLE_STACK_PROTECTOR},0)
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PLAT_BL_COMMON_SOURCES += plat/arm/board/fvp/fvp_stack_protector.c
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endif
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ifeq (${ARCH},aarch32)
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NEED_BL32 := yes
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endif
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# Add support for platform supplied linker script for BL31 build
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$(eval $(call add_define,PLAT_EXTRA_LD_SCRIPT))
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ifneq (${BL2_AT_EL3}, 0)
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override BL1_SOURCES =
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endif
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ifeq (${ENABLE_SPM},1)
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ifneq (${ARM_BL31_IN_DRAM},1)
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$(error "Error: SPM needs BL31 to be located in DRAM.")
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endif
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endif
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include plat/arm/board/common/board_common.mk
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include plat/arm/common/arm_common.mk
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