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https://github.com/ARM-software/arm-trusted-firmware.git
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e3ec6ff4b2
rk3588 is an Octa-core soc with Cortex-a55/a76 inside. This patch supports the following functions: 1. basic platform setup 2. power up/off cpus 3. suspend/resume cpus 4. suspend/resume system 5. reset system 6. power off system Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com> Change-Id: I598109f15a2efd5b33aedd176cf708c08cb1dcf4
51 lines
1.4 KiB
C
51 lines
1.4 KiB
C
/*
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* Copyright (c) 2024, Rockchip, Inc. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef PLAT_PM_HELPERS_H
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#define PLAT_PM_HELPERS_H
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#include <stdint.h>
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/**
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* Use this macro to define a register region.
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* start: start offset from the base address.
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* end: end offset from the base address.
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* stride: stride of registers in region.
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* base: base address of registers in region.
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* wmsk: write mask of registers in region.
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*/
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#define REG_REGION(_start, _end, _stride, _base, _wmsk) \
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{ \
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.start = (_base) + (_start), \
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.end = (_base) + (_end), \
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.stride = _stride, \
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.wmsk = _wmsk \
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}
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struct reg_region {
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/* Start address of region */
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uint32_t start;
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/* End address of region */
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uint32_t end;
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/* Stride of registers in region */
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uint32_t stride;
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/* Write mask of registers in region */
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uint32_t wmsk;
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/* Buffer to save/restore registers in region */
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uint32_t *buf;
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};
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void rockchip_alloc_region_mem(struct reg_region *rgns, uint32_t rgn_num);
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void rockchip_reg_rgn_save(struct reg_region *rgns, uint32_t rgn_num);
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void rockchip_reg_rgn_restore(struct reg_region *rgns, uint32_t rgn_num);
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void rockchip_reg_rgn_restore_reverse(struct reg_region *rgns, uint32_t rgn_num);
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void rockchip_regs_dump(uint32_t base,
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uint32_t start_offset,
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uint32_t end_offset,
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uint32_t stride);
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void rockchip_dump_reg_rgns(struct reg_region *rgns, uint32_t rgn_num);
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#endif /* PLAT_PM_HELPERS_H */
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