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https://github.com/ARM-software/arm-trusted-firmware.git
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62269d4743
Move the flash address to its own devicetree node in tc_spmc_manifest.dtsi. This patch also changes the device-type to ns-device-memory which is the correct type for a flash device. Change-Id: I19503ac35c433661faaaa01c0b83a16540d73810 Co-developed-by: Jackson Cooper-Driver <jackson.cooper-driver@arm.com> Signed-off-by: Davidson K <davidson.kumaresan@arm.com> Signed-off-by: Jackson Cooper-Driver <jackson.cooper-driver@arm.com> Signed-off-by: Icen Zeyada <Icen.Zeyada2@arm.com>
123 lines
2.4 KiB
Text
123 lines
2.4 KiB
Text
/*
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* Copyright (c) 2020-2024, Arm Limited. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <platform_def.h>
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/ {
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compatible = "arm,ffa-core-manifest-1.0";
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#address-cells = <2>;
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#size-cells = <2>;
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attribute {
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spmc_id = <0x8000>;
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maj_ver = <0x1>;
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min_ver = <0x2>;
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exec_state = <0x0>;
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load_address = <0x0 0xfd000000>;
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entrypoint = <0x0 0xfd000000>;
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binary_size = <0x80000>;
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};
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hafnium:hypervisor {
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compatible = "hafnium,hafnium";
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/* filled in in top level .dts */
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};
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cpus {
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#address-cells = <0x2>;
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#size-cells = <0x0>;
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CPU0:cpu@0 {
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device_type = "cpu";
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compatible = "arm,armv8";
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reg = <0x0 0x0>;
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enable-method = "psci";
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};
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/*
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* SPMC (Hafnium) requires secondary cpu nodes are declared in
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* descending order
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*/
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CPU7:cpu@700 {
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device_type = "cpu";
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compatible = "arm,armv8";
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reg = <0x0 0x700>;
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enable-method = "psci";
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};
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CPU6:cpu@600 {
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device_type = "cpu";
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compatible = "arm,armv8";
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reg = <0x0 0x600>;
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enable-method = "psci";
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};
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CPU5:cpu@500 {
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device_type = "cpu";
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compatible = "arm,armv8";
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reg = <0x0 0x500>;
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enable-method = "psci";
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};
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CPU4:cpu@400 {
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device_type = "cpu";
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compatible = "arm,armv8";
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reg = <0x0 0x400>;
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enable-method = "psci";
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};
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CPU3:cpu@300 {
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device_type = "cpu";
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compatible = "arm,armv8";
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reg = <0x0 0x300>;
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enable-method = "psci";
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};
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CPU2:cpu@200 {
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device_type = "cpu";
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compatible = "arm,armv8";
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reg = <0x0 0x200>;
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enable-method = "psci";
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};
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CPU1:cpu@100 {
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device_type = "cpu";
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compatible = "arm,armv8";
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reg = <0x0 0x100>;
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enable-method = "psci";
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};
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};
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/* the full secure world range */
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memory@0 {
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device_type = "memory";
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reg = <0x0 TC_TZC_DRAM1_BASE 0x0 TC_TZC_DRAM1_SIZE>,
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<0x0 0xff000000 0x0 0x1000000>;
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};
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memory@1 {
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device_type = "ns-memory";
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reg = <0x0 TC_NS_DRAM1_BASE 0x0 TC_NS_DRAM1_SIZE>,
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<HI(PLAT_ARM_DRAM2_BASE) LO(PLAT_ARM_DRAM2_BASE)
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HI(TC_NS_DRAM2_SIZE) LO(TC_NS_DRAM2_SIZE)>;
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};
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memory@2 {
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device_type = "device-memory";
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reg = <0x0 0x25000000 0x0 0x10000>; /* For cactus tertiary dummy device. */
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};
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s_uart {
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device_type = "device-memory";
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reg = <0x0 PLAT_ARM_BOOT_UART_BASE 0x0 0x01000>;
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};
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#ifdef TS_SP_FW_CONFIG
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ns_flash {
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device_type = "ns-device-memory";
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reg = <0x0 V2M_FLASH0_BASE 0x0 V2M_FLASH0_SIZE>;
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};
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#endif
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};
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