Sona Mathew 47312115de fix(cpus): workaround for Cortex-X4 erratum 2763018 ... Cortex-X4 erratum 2763018 is a Cat B erratum that is present in revisions r0p0, r0p1 and is fixed in r0p2. The workaround is to set bit[47] of CPUACTLR3_EL1 register. Setting this chicken bit might have a small impact on power and negligible impact on performance. SDEN documentation: https://developer.arm.com/documentation/SDEN2432808/latest Change-Id: Ia188e08c2eb2952923ec72e2a56efdeea836fe1e Signed-off-by: Sona Mathew <sonarebecca.mathew@arm.com>		2024-04-23 15:14:15 -05:00
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alt-boot-flows.rst
auth-framework.rst	docs(auth): add missing AUTH_PARAM_NV_CTR value	2024-02-02 15:32:34 +01:00
cpu-specific-build-macros.rst	fix(cpus): workaround for Cortex-X4 erratum 2763018	2024-04-23 15:14:15 -05:00
firmware-design.rst	refactor(mte): remove mte, mte_perm	2024-03-26 14:30:58 -05:00
index.rst	docs: add top level section numbering	2022-11-16 14:06:48 +00:00
interrupt-framework-design.rst
psci-pd-tree.rst
reset-design.rst	docs: update RESET_TO_BL31 documentation	2023-03-09 14:42:49 +00:00
trusted-board-boot-build.rst	docs(arm): add ARM_ROTPK_LOCATION variant full key	2022-12-09 14:55:39 -06:00
trusted-board-boot.rst	docs(auth): align TBBR CoT names to match the code	2024-02-26 12:39:06 +00:00