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https://github.com/ARM-software/arm-trusted-firmware.git
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f3d3b316f8
Replaced plat_get_syscnt_freq by plat_get_syscnt_freq2 on all upstream platforms. Change-Id: I3248f3f65a16dc5e9720012a05c35b9e3ba6abbe
84 lines
3.1 KiB
C
84 lines
3.1 KiB
C
/*
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* Copyright (c) 2015, ARM Limited and Contributors. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* Redistributions of source code must retain the above copyright notice, this
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* list of conditions and the following disclaimer.
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*
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* Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* Neither the name of ARM nor the names of its contributors may be used
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* to endorse or promote products derived from this software without specific
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* prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef __TEGRA_PRIVATE_H__
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#define __TEGRA_PRIVATE_H__
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#include <arch.h>
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#include <platform_def.h>
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#include <psci.h>
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#include <xlat_tables.h>
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/*******************************************************************************
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* Tegra DRAM memory base address
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******************************************************************************/
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#define TEGRA_DRAM_BASE 0x80000000
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#define TEGRA_DRAM_END 0x27FFFFFFF
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typedef struct plat_params_from_bl2 {
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uint64_t tzdram_size;
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} plat_params_from_bl2_t;
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/* Declarations for plat_psci_handlers.c */
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int32_t tegra_soc_validate_power_state(unsigned int power_state,
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psci_power_state_t *req_state);
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/* Declarations for plat_setup.c */
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const mmap_region_t *plat_get_mmio_map(void);
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/* Declarations for plat_secondary.c */
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void plat_secondary_setup(void);
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int plat_lock_cpu_vectors(void);
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/* Declarations for tegra_gic.c */
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void tegra_gic_setup(void);
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void tegra_gic_cpuif_deactivate(void);
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/* Declarations for tegra_security.c */
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void tegra_security_setup(void);
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void tegra_security_setup_videomem(uintptr_t base, uint64_t size);
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/* Declarations for tegra_pm.c */
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void tegra_pm_system_suspend_entry(void);
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void tegra_pm_system_suspend_exit(void);
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int tegra_system_suspended(void);
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/* Declarations for tegraXXX_pm.c */
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int tegra_prepare_cpu_suspend(unsigned int id, unsigned int afflvl);
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int tegra_prepare_cpu_on_finish(unsigned long mpidr);
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/* Declarations for tegra_bl31_setup.c */
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plat_params_from_bl2_t *bl31_get_plat_params(void);
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int bl31_check_ns_address(uint64_t base, uint64_t size_in_bytes);
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/* Declarations for tegra_delay_timer.c */
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void tegra_delay_timer_init(void);
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#endif /* __TEGRA_PRIVATE_H__ */
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