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461c0a5d92
Currently, EL3 context registers are duplicated per-world per-cpu. Some registers have the same value across all CPUs, so this patch moves these registers out into a per-world context to reduce memory usage. Change-Id: I91294e3d5f4af21a58c23599af2bdbd2a747c54a Signed-off-by: Elizabeth Ho <elizabeth.ho@arm.com> Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com>
51 lines
1.4 KiB
C
51 lines
1.4 KiB
C
/*
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* Copyright (c) 2021-2023, Arm Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef SME_H
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#define SME_H
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#include <stdbool.h>
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#include <context.h>
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/*
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* Maximum value of LEN field in SMCR_ELx. This is different than the maximum
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* supported value which is platform dependent. In the first version of SME the
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* LEN field is limited to 4 bits but will be expanded in future iterations.
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* To support different versions, the code that discovers the supported vector
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* lengths will write the max value into SMCR_ELx then read it back to see how
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* many bits are implemented.
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*/
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#define SME_SMCR_LEN_MAX U(0x1FF)
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#if ENABLE_SME_FOR_NS
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void sme_init_el3(void);
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void sme_init_el2_unused(void);
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void sme_enable(cpu_context_t *context);
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void sme_disable(cpu_context_t *context);
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void sme_enable_per_world(per_world_context_t *per_world_ctx);
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void sme_disable_per_world(per_world_context_t *per_world_ctx);
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#else
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static inline void sme_init_el3(void)
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{
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}
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static inline void sme_init_el2_unused(void)
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{
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}
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static inline void sme_enable(cpu_context_t *context)
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{
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}
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static inline void sme_disable(cpu_context_t *context)
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{
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}
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static inline void sme_enable_per_world(per_world_context_t *per_world_ctx)
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{
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}
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static inline void sme_disable_per_world(per_world_context_t *per_world_ctx)
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{
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}
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#endif /* ENABLE_SME_FOR_NS */
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#endif /* SME_H */
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