mirror of
https://github.com/ARM-software/arm-trusted-firmware.git
synced 2025-04-15 17:14:21 +00:00
dea307fd6c
Removed RSS usage from the Base AEM FVP platform, as it wasn't functional on this platform. The Base AEM FVP platform lacks support for RSS. Instead, the TC2 platform with RSS is available for actual RSS interface implementation and testing. Change-Id: I8f68157319399ab526f9e851b26dba903db5c2e7 Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
525 lines
16 KiB
Makefile
525 lines
16 KiB
Makefile
#
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# Copyright (c) 2013-2023, Arm Limited and Contributors. All rights reserved.
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#
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# SPDX-License-Identifier: BSD-3-Clause
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#
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include common/fdt_wrappers.mk
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# Use the GICv3 driver on the FVP by default
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FVP_USE_GIC_DRIVER := FVP_GICV3
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# Default cluster count for FVP
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FVP_CLUSTER_COUNT := 2
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# Default number of CPUs per cluster on FVP
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FVP_MAX_CPUS_PER_CLUSTER := 4
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# Default number of threads per CPU on FVP
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FVP_MAX_PE_PER_CPU := 1
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# Disable redistributor frame of inactive/fused CPU cores by marking it as read
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# only; enable redistributor frames of all CPU cores by default.
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FVP_GICR_REGION_PROTECTION := 0
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FVP_DT_PREFIX := fvp-base-gicv3-psci
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# Size (in kilobytes) of the Trusted SRAM region to utilize when building for
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# the FVP platform. This option defaults to 256.
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FVP_TRUSTED_SRAM_SIZE := 256
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# Macro to enable helpers for running SPM tests. Disabled by default.
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PLAT_TEST_SPM := 0
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# This is a very trickly TEMPORARY fix. Enabling ALL features exceeds BL31's
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# progbits limit. We need a way to build all useful configurations while waiting
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# on the fvp to increase its SRAM size. The problem is twofild:
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# 1. the cleanup that introduced these enables cleaned up tf-a a little too
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# well and things that previously (incorrectly) were enabled, no longer are.
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# A bunch of CI configs build subtly incorrectly and this combo makes it
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# necessary to forcefully and unconditionally enable them here.
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# 2. the progbits limit is exceeded only when the tsp is involved. However,
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# there are tsp CI configs that run on very high architecture revisions so
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# disabling everything isn't an option.
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# The fix is to enable everything, as before. When the tsp is included, though,
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# we need to slim the size down. In that case, disable all optional features,
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# that will not be present in CI when the tsp is.
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# Similarly, DRTM support is only tested on v8.0 models. Disable everything just
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# for it.
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# TODO: make all of this unconditional (or only base the condition on
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# ARM_ARCH_* when the makefile supports it).
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ifneq (${DRTM_SUPPORT}, 1)
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ifneq (${SPD}, tspd)
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ENABLE_FEAT_AMU := 2
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ENABLE_FEAT_AMUv1p1 := 2
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ENABLE_FEAT_HCX := 2
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ENABLE_FEAT_RNG := 2
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ENABLE_FEAT_TWED := 2
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ENABLE_FEAT_GCS := 2
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ifeq (${ARCH}, aarch64)
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ifneq (${SPD}, spmd)
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ifeq (${SPM_MM}, 0)
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ifeq (${CTX_INCLUDE_FPREGS}, 0)
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ENABLE_SME_FOR_NS := 2
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ENABLE_SME2_FOR_NS := 2
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endif
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endif
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endif
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endif
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endif
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# enable unconditionally for all builds
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ifeq (${ARCH}, aarch64)
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ENABLE_BRBE_FOR_NS := 2
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ENABLE_TRBE_FOR_NS := 2
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endif
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ENABLE_SYS_REG_TRACE_FOR_NS := 2
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ENABLE_FEAT_CSV2_2 := 2
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ENABLE_FEAT_DIT := 2
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ENABLE_FEAT_PAN := 2
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ENABLE_FEAT_MTE_PERM := 2
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ENABLE_FEAT_VHE := 2
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CTX_INCLUDE_NEVE_REGS := 2
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ENABLE_FEAT_SEL2 := 2
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ENABLE_TRF_FOR_NS := 2
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ENABLE_FEAT_ECV := 2
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ENABLE_FEAT_FGT := 2
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ENABLE_FEAT_TCR2 := 2
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ENABLE_FEAT_S2PIE := 2
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ENABLE_FEAT_S1PIE := 2
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ENABLE_FEAT_S2POE := 2
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ENABLE_FEAT_S1POE := 2
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endif
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# The FVP platform depends on this macro to build with correct GIC driver.
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$(eval $(call add_define,FVP_USE_GIC_DRIVER))
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# Pass FVP_CLUSTER_COUNT to the build system.
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$(eval $(call add_define,FVP_CLUSTER_COUNT))
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# Pass FVP_MAX_CPUS_PER_CLUSTER to the build system.
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$(eval $(call add_define,FVP_MAX_CPUS_PER_CLUSTER))
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# Pass FVP_MAX_PE_PER_CPU to the build system.
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$(eval $(call add_define,FVP_MAX_PE_PER_CPU))
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# Pass FVP_GICR_REGION_PROTECTION to the build system.
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$(eval $(call add_define,FVP_GICR_REGION_PROTECTION))
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# Pass FVP_TRUSTED_SRAM_SIZE to the build system.
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$(eval $(call add_define,FVP_TRUSTED_SRAM_SIZE))
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# Sanity check the cluster count and if FVP_CLUSTER_COUNT <= 2,
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# choose the CCI driver , else the CCN driver
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ifeq ($(FVP_CLUSTER_COUNT), 0)
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$(error "Incorrect cluster count specified for FVP port")
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else ifeq ($(FVP_CLUSTER_COUNT),$(filter $(FVP_CLUSTER_COUNT),1 2))
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FVP_INTERCONNECT_DRIVER := FVP_CCI
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else
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FVP_INTERCONNECT_DRIVER := FVP_CCN
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endif
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$(eval $(call add_define,FVP_INTERCONNECT_DRIVER))
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# Choose the GIC sources depending upon the how the FVP will be invoked
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ifeq (${FVP_USE_GIC_DRIVER}, FVP_GICV3)
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# The GIC model (GIC-600 or GIC-500) will be detected at runtime
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GICV3_SUPPORT_GIC600 := 1
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GICV3_OVERRIDE_DISTIF_PWR_OPS := 1
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# Include GICv3 driver files
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include drivers/arm/gic/v3/gicv3.mk
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FVP_GIC_SOURCES := ${GICV3_SOURCES} \
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plat/common/plat_gicv3.c \
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plat/arm/common/arm_gicv3.c
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ifeq ($(filter 1,${RESET_TO_BL2} \
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${RESET_TO_BL31} ${RESET_TO_SP_MIN}),)
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FVP_GIC_SOURCES += plat/arm/board/fvp/fvp_gicv3.c
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endif
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else ifeq (${FVP_USE_GIC_DRIVER}, FVP_GICV2)
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# No GICv4 extension
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GIC_ENABLE_V4_EXTN := 0
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$(eval $(call add_define,GIC_ENABLE_V4_EXTN))
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# Include GICv2 driver files
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include drivers/arm/gic/v2/gicv2.mk
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FVP_GIC_SOURCES := ${GICV2_SOURCES} \
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plat/common/plat_gicv2.c \
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plat/arm/common/arm_gicv2.c
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FVP_DT_PREFIX := fvp-base-gicv2-psci
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else
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$(error "Incorrect GIC driver chosen on FVP port")
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endif
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ifeq (${FVP_INTERCONNECT_DRIVER}, FVP_CCI)
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FVP_INTERCONNECT_SOURCES := drivers/arm/cci/cci.c
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else ifeq (${FVP_INTERCONNECT_DRIVER}, FVP_CCN)
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FVP_INTERCONNECT_SOURCES := drivers/arm/ccn/ccn.c \
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plat/arm/common/arm_ccn.c
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else
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$(error "Incorrect CCN driver chosen on FVP port")
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endif
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FVP_SECURITY_SOURCES := drivers/arm/tzc/tzc400.c \
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plat/arm/board/fvp/fvp_security.c \
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plat/arm/common/arm_tzc400.c
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PLAT_INCLUDES := -Iplat/arm/board/fvp/include \
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-Iinclude/lib/psa
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PLAT_BL_COMMON_SOURCES := plat/arm/board/fvp/fvp_common.c
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FVP_CPU_LIBS := lib/cpus/${ARCH}/aem_generic.S
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ifeq (${ARCH}, aarch64)
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# select a different set of CPU files, depending on whether we compile for
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# hardware assisted coherency cores or not
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ifeq (${HW_ASSISTED_COHERENCY}, 0)
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# Cores used without DSU
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FVP_CPU_LIBS += lib/cpus/aarch64/cortex_a35.S \
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lib/cpus/aarch64/cortex_a53.S \
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lib/cpus/aarch64/cortex_a57.S \
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lib/cpus/aarch64/cortex_a72.S \
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lib/cpus/aarch64/cortex_a73.S
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else
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# Cores used with DSU only
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ifeq (${CTX_INCLUDE_AARCH32_REGS}, 0)
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# AArch64-only cores
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# TODO: add all cores to the appropriate lists
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FVP_CPU_LIBS += lib/cpus/aarch64/cortex_a65.S \
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lib/cpus/aarch64/cortex_a65ae.S \
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lib/cpus/aarch64/cortex_a76.S \
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lib/cpus/aarch64/cortex_a76ae.S \
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lib/cpus/aarch64/cortex_a77.S \
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lib/cpus/aarch64/cortex_a78.S \
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lib/cpus/aarch64/cortex_a78_ae.S \
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lib/cpus/aarch64/cortex_a78c.S \
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lib/cpus/aarch64/cortex_a710.S \
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lib/cpus/aarch64/neoverse_n_common.S \
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lib/cpus/aarch64/neoverse_n1.S \
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lib/cpus/aarch64/neoverse_n2.S \
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lib/cpus/aarch64/neoverse_v1.S \
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lib/cpus/aarch64/neoverse_e1.S \
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lib/cpus/aarch64/cortex_x2.S \
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lib/cpus/aarch64/cortex_gelas.S \
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lib/cpus/aarch64/nevis.S \
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lib/cpus/aarch64/travis.S
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endif
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# AArch64/AArch32 cores
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FVP_CPU_LIBS += lib/cpus/aarch64/cortex_a55.S \
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lib/cpus/aarch64/cortex_a75.S
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endif
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else
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FVP_CPU_LIBS += lib/cpus/aarch32/cortex_a32.S \
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lib/cpus/aarch32/cortex_a57.S \
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lib/cpus/aarch32/cortex_a53.S
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endif
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BL1_SOURCES += drivers/arm/smmu/smmu_v3.c \
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drivers/arm/sp805/sp805.c \
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drivers/delay_timer/delay_timer.c \
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drivers/io/io_semihosting.c \
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lib/semihosting/semihosting.c \
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lib/semihosting/${ARCH}/semihosting_call.S \
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plat/arm/board/fvp/${ARCH}/fvp_helpers.S \
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plat/arm/board/fvp/fvp_bl1_setup.c \
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plat/arm/board/fvp/fvp_err.c \
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plat/arm/board/fvp/fvp_io_storage.c \
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${FVP_CPU_LIBS} \
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${FVP_INTERCONNECT_SOURCES}
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ifeq (${USE_SP804_TIMER},1)
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BL1_SOURCES += drivers/arm/sp804/sp804_delay_timer.c
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else
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BL1_SOURCES += drivers/delay_timer/generic_delay_timer.c
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endif
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BL2_SOURCES += drivers/arm/sp805/sp805.c \
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drivers/io/io_semihosting.c \
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lib/utils/mem_region.c \
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lib/semihosting/semihosting.c \
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lib/semihosting/${ARCH}/semihosting_call.S \
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plat/arm/board/fvp/fvp_bl2_setup.c \
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plat/arm/board/fvp/fvp_err.c \
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plat/arm/board/fvp/fvp_io_storage.c \
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plat/arm/common/arm_nor_psci_mem_protect.c \
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${FVP_SECURITY_SOURCES}
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ifeq (${COT_DESC_IN_DTB},1)
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BL2_SOURCES += plat/arm/common/fconf/fconf_nv_cntr_getter.c
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endif
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ifeq (${ENABLE_RME},1)
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BL2_SOURCES += plat/arm/board/fvp/aarch64/fvp_helpers.S
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BL31_SOURCES += plat/arm/board/fvp/fvp_plat_attest_token.c \
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plat/arm/board/fvp/fvp_realm_attest_key.c
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endif
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ifeq (${ENABLE_FEAT_RNG_TRAP},1)
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BL31_SOURCES += plat/arm/board/fvp/fvp_sync_traps.c
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endif
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ifeq (${RESET_TO_BL2},1)
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BL2_SOURCES += plat/arm/board/fvp/${ARCH}/fvp_helpers.S \
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plat/arm/board/fvp/fvp_bl2_el3_setup.c \
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${FVP_CPU_LIBS} \
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${FVP_INTERCONNECT_SOURCES}
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endif
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ifeq (${USE_SP804_TIMER},1)
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BL2_SOURCES += drivers/arm/sp804/sp804_delay_timer.c
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endif
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BL2U_SOURCES += plat/arm/board/fvp/fvp_bl2u_setup.c \
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${FVP_SECURITY_SOURCES}
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ifeq (${USE_SP804_TIMER},1)
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BL2U_SOURCES += drivers/arm/sp804/sp804_delay_timer.c
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endif
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BL31_SOURCES += drivers/arm/fvp/fvp_pwrc.c \
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drivers/arm/smmu/smmu_v3.c \
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drivers/delay_timer/delay_timer.c \
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drivers/cfi/v2m/v2m_flash.c \
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lib/utils/mem_region.c \
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plat/arm/board/fvp/fvp_bl31_setup.c \
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plat/arm/board/fvp/fvp_console.c \
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plat/arm/board/fvp/fvp_pm.c \
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plat/arm/board/fvp/fvp_topology.c \
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plat/arm/board/fvp/aarch64/fvp_helpers.S \
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plat/arm/common/arm_nor_psci_mem_protect.c \
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${FVP_CPU_LIBS} \
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${FVP_GIC_SOURCES} \
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${FVP_INTERCONNECT_SOURCES} \
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${FVP_SECURITY_SOURCES}
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# Support for fconf in BL31
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# Added separately from the above list for better readability
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ifeq ($(filter 1,${RESET_TO_BL2} ${RESET_TO_BL31}),)
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BL31_SOURCES += lib/fconf/fconf.c \
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lib/fconf/fconf_dyn_cfg_getter.c \
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plat/arm/board/fvp/fconf/fconf_hw_config_getter.c
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BL31_SOURCES += ${FDT_WRAPPERS_SOURCES}
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ifeq (${SEC_INT_DESC_IN_FCONF},1)
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BL31_SOURCES += plat/arm/common/fconf/fconf_sec_intr_config.c
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endif
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endif
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ifeq (${USE_SP804_TIMER},1)
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BL31_SOURCES += drivers/arm/sp804/sp804_delay_timer.c
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else
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BL31_SOURCES += drivers/delay_timer/generic_delay_timer.c
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endif
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# Add the FDT_SOURCES and options for Dynamic Config (only for Unix env)
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ifdef UNIX_MK
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FVP_HW_CONFIG_DTS := fdts/${FVP_DT_PREFIX}.dts
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FDT_SOURCES += $(addprefix plat/arm/board/fvp/fdts/, \
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${PLAT}_fw_config.dts \
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${PLAT}_tb_fw_config.dts \
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${PLAT}_soc_fw_config.dts \
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${PLAT}_nt_fw_config.dts \
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)
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FVP_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_fw_config.dtb
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FVP_TB_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_tb_fw_config.dtb
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FVP_SOC_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_soc_fw_config.dtb
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FVP_NT_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_nt_fw_config.dtb
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ifeq (${SPD},tspd)
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FDT_SOURCES += plat/arm/board/fvp/fdts/${PLAT}_tsp_fw_config.dts
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FVP_TOS_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_tsp_fw_config.dtb
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# Add the TOS_FW_CONFIG to FIP and specify the same to certtool
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$(eval $(call TOOL_ADD_PAYLOAD,${FVP_TOS_FW_CONFIG},--tos-fw-config,${FVP_TOS_FW_CONFIG}))
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endif
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ifeq (${TRANSFER_LIST}, 1)
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include lib/transfer_list/transfer_list.mk
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endif
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ifeq (${SPD},spmd)
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ifeq ($(ARM_SPMC_MANIFEST_DTS),)
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ARM_SPMC_MANIFEST_DTS := plat/arm/board/fvp/fdts/${PLAT}_spmc_manifest.dts
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endif
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FDT_SOURCES += ${ARM_SPMC_MANIFEST_DTS}
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FVP_TOS_FW_CONFIG := ${BUILD_PLAT}/fdts/$(notdir $(basename ${ARM_SPMC_MANIFEST_DTS})).dtb
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# Add the TOS_FW_CONFIG to FIP and specify the same to certtool
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$(eval $(call TOOL_ADD_PAYLOAD,${FVP_TOS_FW_CONFIG},--tos-fw-config,${FVP_TOS_FW_CONFIG}))
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endif
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# Add the FW_CONFIG to FIP and specify the same to certtool
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$(eval $(call TOOL_ADD_PAYLOAD,${FVP_FW_CONFIG},--fw-config,${FVP_FW_CONFIG}))
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# Add the TB_FW_CONFIG to FIP and specify the same to certtool
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$(eval $(call TOOL_ADD_PAYLOAD,${FVP_TB_FW_CONFIG},--tb-fw-config,${FVP_TB_FW_CONFIG}))
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# Add the SOC_FW_CONFIG to FIP and specify the same to certtool
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$(eval $(call TOOL_ADD_PAYLOAD,${FVP_SOC_FW_CONFIG},--soc-fw-config,${FVP_SOC_FW_CONFIG}))
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# Add the NT_FW_CONFIG to FIP and specify the same to certtool
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$(eval $(call TOOL_ADD_PAYLOAD,${FVP_NT_FW_CONFIG},--nt-fw-config,${FVP_NT_FW_CONFIG}))
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FDT_SOURCES += ${FVP_HW_CONFIG_DTS}
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$(eval FVP_HW_CONFIG := ${BUILD_PLAT}/$(patsubst %.dts,%.dtb,$(FVP_HW_CONFIG_DTS)))
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# Add the HW_CONFIG to FIP and specify the same to certtool
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$(eval $(call TOOL_ADD_PAYLOAD,${FVP_HW_CONFIG},--hw-config,${FVP_HW_CONFIG}))
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endif
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# Enable dynamic mitigation support by default
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DYNAMIC_WORKAROUND_CVE_2018_3639 := 1
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ifneq (${ENABLE_FEAT_AMU},0)
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BL31_SOURCES += lib/cpus/aarch64/cpuamu.c \
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lib/cpus/aarch64/cpuamu_helpers.S
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ifeq (${HW_ASSISTED_COHERENCY}, 1)
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BL31_SOURCES += lib/cpus/aarch64/cortex_a75_pubsub.c \
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lib/cpus/aarch64/neoverse_n1_pubsub.c
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endif
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endif
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ifeq (${HANDLE_EA_EL3_FIRST_NS},1)
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ifeq (${ENABLE_FEAT_RAS},1)
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BL31_SOURCES += plat/arm/board/fvp/aarch64/fvp_ras.c
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else
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BL31_SOURCES += plat/arm/board/fvp/aarch64/fvp_ea.c
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endif
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endif
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||
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||
ifneq (${ENABLE_STACK_PROTECTOR},0)
|
||
PLAT_BL_COMMON_SOURCES += plat/arm/board/fvp/fvp_stack_protector.c
|
||
endif
|
||
|
||
# Enable the dynamic translation tables library.
|
||
ifeq ($(filter 1,${RESET_TO_BL2} ${ARM_XLAT_TABLES_LIB_V1}),)
|
||
ifeq (${ARCH},aarch32)
|
||
BL32_CPPFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC
|
||
else # AArch64
|
||
BL31_CPPFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC
|
||
endif
|
||
endif
|
||
|
||
ifeq (${ALLOW_RO_XLAT_TABLES}, 1)
|
||
ifeq (${ARCH},aarch32)
|
||
BL32_CPPFLAGS += -DPLAT_RO_XLAT_TABLES
|
||
else # AArch64
|
||
BL31_CPPFLAGS += -DPLAT_RO_XLAT_TABLES
|
||
ifeq (${SPD},tspd)
|
||
BL32_CPPFLAGS += -DPLAT_RO_XLAT_TABLES
|
||
endif
|
||
endif
|
||
endif
|
||
|
||
ifeq (${USE_DEBUGFS},1)
|
||
BL31_CPPFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC
|
||
endif
|
||
|
||
# Add support for platform supplied linker script for BL31 build
|
||
$(eval $(call add_define,PLAT_EXTRA_LD_SCRIPT))
|
||
|
||
ifneq (${RESET_TO_BL2}, 0)
|
||
override BL1_SOURCES =
|
||
endif
|
||
|
||
# Include Measured Boot makefile before any Crypto library makefile.
|
||
# Crypto library makefile may need default definitions of Measured Boot build
|
||
# flags present in Measured Boot makefile.
|
||
ifeq (${MEASURED_BOOT},1)
|
||
RSS_MEASURED_BOOT_MK := drivers/measured_boot/rss/rss_measured_boot.mk
|
||
$(info Including ${RSS_MEASURED_BOOT_MK})
|
||
include ${RSS_MEASURED_BOOT_MK}
|
||
|
||
ifneq (${MBOOT_RSS_HASH_ALG}, sha256)
|
||
$(eval $(call add_define,TF_MBEDTLS_MBOOT_USE_SHA512))
|
||
endif
|
||
|
||
BL1_SOURCES += ${MEASURED_BOOT_SOURCES}
|
||
BL2_SOURCES += ${MEASURED_BOOT_SOURCES}
|
||
endif
|
||
|
||
include plat/arm/board/common/board_common.mk
|
||
include plat/arm/common/arm_common.mk
|
||
|
||
ifeq (${MEASURED_BOOT},1)
|
||
BL1_SOURCES += plat/arm/board/fvp/fvp_common_measured_boot.c \
|
||
plat/arm/board/fvp/fvp_bl1_measured_boot.c \
|
||
lib/psa/measured_boot.c
|
||
|
||
BL2_SOURCES += plat/arm/board/fvp/fvp_common_measured_boot.c \
|
||
plat/arm/board/fvp/fvp_bl2_measured_boot.c \
|
||
lib/psa/measured_boot.c
|
||
endif
|
||
|
||
ifeq (${DRTM_SUPPORT}, 1)
|
||
BL31_SOURCES += plat/arm/board/fvp/fvp_drtm_addr.c \
|
||
plat/arm/board/fvp/fvp_drtm_dma_prot.c \
|
||
plat/arm/board/fvp/fvp_drtm_err.c \
|
||
plat/arm/board/fvp/fvp_drtm_measurement.c \
|
||
plat/arm/board/fvp/fvp_drtm_stub.c \
|
||
plat/arm/common/arm_dyn_cfg.c \
|
||
plat/arm/board/fvp/fvp_err.c
|
||
endif
|
||
|
||
ifeq (${TRUSTED_BOARD_BOOT}, 1)
|
||
BL1_SOURCES += plat/arm/board/fvp/fvp_trusted_boot.c
|
||
BL2_SOURCES += plat/arm/board/fvp/fvp_trusted_boot.c
|
||
|
||
# FVP being a development platform, enable capability to disable Authentication
|
||
# dynamically if TRUSTED_BOARD_BOOT is set.
|
||
DYN_DISABLE_AUTH := 1
|
||
endif
|
||
|
||
ifeq (${SPMC_AT_EL3}, 1)
|
||
PLAT_BL_COMMON_SOURCES += plat/arm/board/fvp/fvp_el3_spmc.c
|
||
endif
|
||
|
||
PSCI_OS_INIT_MODE := 1
|
||
|
||
ifeq (${SPD},spmd)
|
||
BL31_SOURCES += plat/arm/board/fvp/fvp_spmd.c
|
||
endif
|
||
|
||
# Test specific macros, keep them at bottom of this file
|
||
$(eval $(call add_define,PLATFORM_TEST_EA_FFH))
|
||
ifeq (${PLATFORM_TEST_EA_FFH}, 1)
|
||
ifeq (${FFH_SUPPORT}, 0)
|
||
$(error "PLATFORM_TEST_EA_FFH expects FFH_SUPPORT to be 1")
|
||
endif
|
||
|
||
endif
|
||
|
||
$(eval $(call add_define,PLATFORM_TEST_RAS_FFH))
|
||
ifeq (${PLATFORM_TEST_RAS_FFH}, 1)
|
||
ifeq (${ENABLE_FEAT_RAS}, 0)
|
||
$(error "PLATFORM_TEST_RAS_FFH expects ENABLE_FEAT_RAS to be 1")
|
||
endif
|
||
ifeq (${HANDLE_EA_EL3_FIRST_NS}, 0)
|
||
$(error "PLATFORM_TEST_RAS_FFH expects HANDLE_EA_EL3_FIRST_NS to be 1")
|
||
endif
|
||
endif
|
||
|
||
ifeq (${ERRATA_ABI_SUPPORT}, 1)
|
||
include plat/arm/board/fvp/fvp_cpu_errata.mk
|
||
endif
|
||
|
||
# Build macro necessary for running SPM tests on FVP platform
|
||
$(eval $(call add_define,PLAT_TEST_SPM))
|