Jayanth Dodderi Chidanand da1a459132 refactor(cm): update SCTLR_EL2 initialisation ... Currently, during the initial bootup phase SCTLR_EL2 register has been initialised with the endianness bit based on header attribute evaluation at EL3. This is not mandatorily required as TF-A by default, expects the software at EL2 to execute in little endian format ( EE = 0). Henceforth, this patch removes the endianness bit evaluation for SCTLR_EL2 register and initialises with a predefined RESET value, setting SCTLR_EL2.EE=0. Change-Id: I53fdd5bf907cbe35c551fc03cc893821229ff807 Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com>		2024-06-14 18:30:28 +01:00
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aarch32	refactor(cpufeat): add macro to simplify is_feat_xx_present	2024-05-02 12:16:16 -05:00
aarch64	refactor(cm): update SCTLR_EL2 initialisation	2024-06-14 18:30:28 +01:00
cpu_data_array.c	chore: update to use Arm word across TF-A	2023-08-08 15:12:30 +01:00