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arm-trusted-firmware/lib/cpus
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Govindraj Raja d732300b86 fix(cpus): workaround for Cortex-A725 erratum 3699564 
Cortex-A725 erratum 3699564 that applies to r0p0, r0p1 and is
fixed in r0p2.

The workaround is for EL3 software that performs context save/restore
on a change of Security state to use a value of SCR_EL3.NS when
accessing ICH_VMCR_EL2 that reflects the Security state that owns the
data being saved or restored.

SDEN documentation:
https://developer.arm.com/documentation/SDEN-2832921/latest

Change-Id: Ifad1f6c3f5b74060273f897eb5e4b79dd9f088f7
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>
2025-02-03 13:57:50 -06:00
..
aarch32 refactor(cpus): remove cpu specific errata funcs 2024-07-26 11:19:52 +01:00
aarch64 fix(cpus): workaround for Cortex-A725 erratum 3699564 2025-02-03 13:57:50 -06:00
cpu-ops.mk fix(cpus): workaround for Cortex-A725 erratum 3699564 2025-02-03 13:57:50 -06:00
errata_common.c fix(cpus): workaround for Cortex-A725 erratum 3699564 2025-02-03 13:57:50 -06:00
errata_report.c refactor(cpus): directly invoke errata reporter 2024-07-26 11:19:52 +01:00