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https://github.com/ARM-software/arm-trusted-firmware.git
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d4e6f98d7f
1. Add PMIC shutdown API 2. Add PMIC low power settings Change-Id: I634a60fa3e2a74a6031df9fe59e2f52956ef7114 Signed-off-by: Hope Wang <hope.wang@mediatek.corp-partner.google.com>
117 lines
2.4 KiB
C
117 lines
2.4 KiB
C
/*
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* Copyright (c) 2025, Mediatek Inc. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <errno.h>
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#include <common/debug.h>
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#include <drivers/pmic/pmic_psc.h>
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#ifdef CONFIG_MTK_PMIC_SHUTDOWN_CFG
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#include <drivers/pmic/pmic_shutdown_cfg.h>
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#endif
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#define ERR_INVALID_ARGS -EINVAL
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#define ERR_NOT_CONFIGURED -ENODEV
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static const struct pmic_psc_config *pmic_psc;
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static uint32_t read_pmic_psc_reg(enum pmic_psc_reg_name reg_name)
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{
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uint32_t val = 0;
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const struct pmic_psc_reg *reg;
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if (reg_name >= pmic_psc->reg_size)
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return 0;
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reg = &pmic_psc->regs[reg_name];
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pmic_psc->read_field(reg->reg_addr, &val, reg->reg_mask, reg->reg_shift);
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return val;
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}
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static int set_pmic_psc_reg(enum pmic_psc_reg_name reg_name)
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{
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const struct pmic_psc_reg *reg;
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if (reg_name >= pmic_psc->reg_size)
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return ERR_INVALID_ARGS;
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reg = &pmic_psc->regs[reg_name];
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pmic_psc->write_field(reg->reg_addr, 1, reg->reg_mask, reg->reg_shift);
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return 0;
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}
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static int clr_pmic_psc_reg(enum pmic_psc_reg_name reg_name)
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{
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const struct pmic_psc_reg *reg;
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if (reg_name >= pmic_psc->reg_size)
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return ERR_INVALID_ARGS;
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reg = &pmic_psc->regs[reg_name];
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pmic_psc->write_field(reg->reg_addr, 0, reg->reg_mask, reg->reg_shift);
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return 0;
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}
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int enable_pmic_smart_reset(bool enable)
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{
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if (!pmic_psc)
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return ERR_NOT_CONFIGURED;
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if (enable)
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set_pmic_psc_reg(RG_SMART_RST_MODE);
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else
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clr_pmic_psc_reg(RG_SMART_RST_MODE);
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return 0;
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}
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int enable_pmic_smart_reset_shutdown(bool enable)
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{
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if (!pmic_psc)
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return ERR_NOT_CONFIGURED;
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if (enable)
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set_pmic_psc_reg(RG_SMART_RST_SDN_EN);
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else
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clr_pmic_psc_reg(RG_SMART_RST_SDN_EN);
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return 0;
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}
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int platform_cold_reset(void)
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{
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if (!pmic_psc)
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return ERR_NOT_CONFIGURED;
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/* Some PMICs may not support cold reset */
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if (!pmic_psc->regs[RG_CRST].reg_addr)
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return ERR_NOT_CONFIGURED;
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set_pmic_psc_reg(RG_CRST);
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return 0;
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}
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int platform_power_hold(bool hold)
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{
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int use_spmi_cmd_sdn = 0;
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if (!pmic_psc)
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return ERR_NOT_CONFIGURED;
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if (hold)
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set_pmic_psc_reg(RG_PWRHOLD);
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else {
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#ifdef CONFIG_MTK_PMIC_SHUTDOWN_CFG
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use_spmi_cmd_sdn = pmic_shutdown_cfg();
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#endif
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if (use_spmi_cmd_sdn == 1)
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spmi_shutdown();
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else
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clr_pmic_psc_reg(RG_PWRHOLD);
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}
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return 0;
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}
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int pmic_psc_register(const struct pmic_psc_config *psc)
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{
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if (!psc || !psc->regs || !psc->read_field || !psc->write_field)
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return ERR_INVALID_ARGS;
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pmic_psc = psc;
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INFO("POWER_HOLD=0x%x\n", read_pmic_psc_reg(RG_PWRHOLD));
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return 0;
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}
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