mirror of
https://github.com/ARM-software/arm-trusted-firmware.git
synced 2025-04-08 13:53:54 +00:00
d286739716
The Yocto team has requested that we do not use Poetry from within the Makefile, as Yocto does not have network access during the build process. We want to maintain the current behaviour, so this change makes our use of Poetry contigent on it being available in the environment. Additionally, explicitly passing an empty toolchain parameter now allows a tool to be *disabled* (e.g. passing `POETRY=` will prevent the build system from trying to use Poetry). Change-Id: Ibf552a3fee1eaadee767a1b948b559700083b401 Signed-off-by: Chris Kay <chris.kay@arm.com>
491 lines
15 KiB
Makefile
491 lines
15 KiB
Makefile
#
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# Copyright (c) 2015-2024, Arm Limited and Contributors. All rights reserved.
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#
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# SPDX-License-Identifier: BSD-3-Clause
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#
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include common/fdt_wrappers.mk
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ifeq (${ARCH},aarch32)
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ifeq (${AARCH32_SP},none)
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$(error Variable AARCH32_SP has to be set for AArch32)
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endif
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endif
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ifeq (${ARCH}, aarch64)
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# On ARM standard platorms, the TSP can execute from Trusted SRAM, Trusted
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# DRAM (if available) or the TZC secured area of DRAM.
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# TZC secured DRAM is the default.
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ARM_TSP_RAM_LOCATION ?= dram
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ifeq (${ARM_TSP_RAM_LOCATION}, tsram)
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ARM_TSP_RAM_LOCATION_ID = ARM_TRUSTED_SRAM_ID
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else ifeq (${ARM_TSP_RAM_LOCATION}, tdram)
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ARM_TSP_RAM_LOCATION_ID = ARM_TRUSTED_DRAM_ID
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else ifeq (${ARM_TSP_RAM_LOCATION}, dram)
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ARM_TSP_RAM_LOCATION_ID = ARM_DRAM_ID
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else
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$(error Unsupported ARM_TSP_RAM_LOCATION value)
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endif
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# Process flags
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# Process ARM_BL31_IN_DRAM flag
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ARM_BL31_IN_DRAM := 0
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$(eval $(call assert_boolean,ARM_BL31_IN_DRAM))
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$(eval $(call add_define,ARM_BL31_IN_DRAM))
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else
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ARM_TSP_RAM_LOCATION_ID = ARM_TRUSTED_SRAM_ID
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endif
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$(eval $(call add_define,ARM_TSP_RAM_LOCATION_ID))
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# For the original power-state parameter format, the State-ID can be encoded
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# according to the recommended encoding or zero. This flag determines which
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# State-ID encoding to be parsed.
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ARM_RECOM_STATE_ID_ENC := 0
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# If the PSCI_EXTENDED_STATE_ID is set, then ARM_RECOM_STATE_ID_ENC need to
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# be set. Else throw a build error.
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ifeq (${PSCI_EXTENDED_STATE_ID}, 1)
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ifeq (${ARM_RECOM_STATE_ID_ENC}, 0)
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$(error Build option ARM_RECOM_STATE_ID_ENC needs to be set if \
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PSCI_EXTENDED_STATE_ID is set for ARM platforms)
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endif
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endif
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# Process ARM_RECOM_STATE_ID_ENC flag
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$(eval $(call assert_boolean,ARM_RECOM_STATE_ID_ENC))
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$(eval $(call add_define,ARM_RECOM_STATE_ID_ENC))
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# Process ARM_DISABLE_TRUSTED_WDOG flag
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# By default, Trusted Watchdog is always enabled unless
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# SPIN_ON_BL1_EXIT or ENABLE_RME is set
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ARM_DISABLE_TRUSTED_WDOG := 0
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ifneq ($(filter 1,${SPIN_ON_BL1_EXIT} ${ENABLE_RME}),)
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ARM_DISABLE_TRUSTED_WDOG := 1
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endif
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$(eval $(call assert_boolean,ARM_DISABLE_TRUSTED_WDOG))
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$(eval $(call add_define,ARM_DISABLE_TRUSTED_WDOG))
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# Process ARM_CONFIG_CNTACR
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ARM_CONFIG_CNTACR := 1
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$(eval $(call assert_boolean,ARM_CONFIG_CNTACR))
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$(eval $(call add_define,ARM_CONFIG_CNTACR))
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# Process ARM_BL31_IN_DRAM flag
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ARM_BL31_IN_DRAM := 0
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$(eval $(call assert_boolean,ARM_BL31_IN_DRAM))
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$(eval $(call add_define,ARM_BL31_IN_DRAM))
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# As per CCA security model, all root firmware must execute from on-chip secure
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# memory. This means we must not run BL31 from TZC-protected DRAM.
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ifeq (${ARM_BL31_IN_DRAM},1)
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ifeq (${ENABLE_RME},1)
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$(error BL31 must not run from DRAM on RME-systems. Please set ARM_BL31_IN_DRAM to 0)
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endif
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endif
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# Process ARM_PLAT_MT flag
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ARM_PLAT_MT := 0
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$(eval $(call assert_boolean,ARM_PLAT_MT))
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$(eval $(call add_define,ARM_PLAT_MT))
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# Use translation tables library v2 by default
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ARM_XLAT_TABLES_LIB_V1 := 0
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$(eval $(call assert_boolean,ARM_XLAT_TABLES_LIB_V1))
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$(eval $(call add_define,ARM_XLAT_TABLES_LIB_V1))
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# Don't have the Linux kernel as a BL33 image by default
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ARM_LINUX_KERNEL_AS_BL33 := 0
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$(eval $(call assert_boolean,ARM_LINUX_KERNEL_AS_BL33))
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$(eval $(call add_define,ARM_LINUX_KERNEL_AS_BL33))
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ifeq (${ARM_LINUX_KERNEL_AS_BL33},1)
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ifneq (${ARCH},aarch64)
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ifneq (${RESET_TO_SP_MIN},1)
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$(error ARM_LINUX_KERNEL_AS_BL33 is only available if RESET_TO_SP_MIN=1.)
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endif
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endif
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ifndef PRELOADED_BL33_BASE
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$(error PRELOADED_BL33_BASE must be set if ARM_LINUX_KERNEL_AS_BL33 is used.)
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endif
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ifeq (${RESET_TO_BL31},1)
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ifndef ARM_PRELOADED_DTB_BASE
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$(error ARM_PRELOADED_DTB_BASE must be set if ARM_LINUX_KERNEL_AS_BL33 is used with RESET_TO_BL31.)
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endif
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$(eval $(call add_define,ARM_PRELOADED_DTB_BASE))
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endif
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endif
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# Add the build options to pack Trusted OS Extra1 and Trusted OS Extra2 images
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# in the FIP if the platform requires.
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ifneq ($(BL32_EXTRA1),)
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$(eval $(call TOOL_ADD_IMG,bl32_extra1,--tos-fw-extra1))
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endif
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ifneq ($(BL32_EXTRA2),)
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$(eval $(call TOOL_ADD_IMG,bl32_extra2,--tos-fw-extra2))
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endif
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# Enable PSCI_STAT_COUNT/RESIDENCY APIs on ARM platforms
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ENABLE_PSCI_STAT := 1
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ENABLE_PMF := 1
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# Override the standard libc with optimised libc_asm
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OVERRIDE_LIBC := 1
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ifeq (${OVERRIDE_LIBC},1)
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include lib/libc/libc_asm.mk
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endif
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# On ARM platforms, separate the code and read-only data sections to allow
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# mapping the former as executable and the latter as execute-never.
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SEPARATE_CODE_AND_RODATA := 1
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# On ARM platforms, disable SEPARATE_NOBITS_REGION by default. Both PROGBITS
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# and NOBITS sections of BL31 image are adjacent to each other and loaded
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# into Trusted SRAM.
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SEPARATE_NOBITS_REGION := 0
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# In order to support SEPARATE_NOBITS_REGION for Arm platforms, we need to load
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# BL31 PROGBITS into secure DRAM space and BL31 NOBITS into SRAM. Hence mandate
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# the build to require that ARM_BL31_IN_DRAM is enabled as well.
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ifeq ($(SEPARATE_NOBITS_REGION),1)
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ifneq ($(ARM_BL31_IN_DRAM),1)
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$(error For SEPARATE_NOBITS_REGION, ARM_BL31_IN_DRAM must be enabled)
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endif
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ifneq ($(RECLAIM_INIT_CODE),0)
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$(error For SEPARATE_NOBITS_REGION, RECLAIM_INIT_CODE cannot be supported)
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endif
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endif
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# Enable PIE support for RESET_TO_BL31/RESET_TO_SP_MIN case
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ifneq ($(filter 1,${RESET_TO_BL31} ${RESET_TO_SP_MIN}),)
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ENABLE_PIE := 1
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endif
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# Disable GPT parser support, use FIP image by default
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ARM_GPT_SUPPORT := 0
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$(eval $(call assert_boolean,ARM_GPT_SUPPORT))
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$(eval $(call add_define,ARM_GPT_SUPPORT))
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# Include necessary sources to parse GPT image
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ifeq (${ARM_GPT_SUPPORT}, 1)
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BL2_SOURCES += drivers/partition/gpt.c \
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drivers/partition/partition.c
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endif
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# Enable CRC instructions via extension for ARMv8-A CPUs.
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# For ARMv8.1-A, and onwards CRC instructions are default enabled.
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# Enable HW computed CRC support unconditionally in BL2 component.
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ifeq (${ARM_ARCH_MAJOR},8)
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ifeq (${ARM_ARCH_MINOR},0)
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BL2_CPPFLAGS += -march=armv8-a+crc
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endif
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endif
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ifeq ($(PSA_FWU_SUPPORT),1)
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# GPT support is recommended as per PSA FWU specification hence
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# PSA FWU implementation is tightly coupled with GPT support,
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# and it does not support other formats.
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ifneq ($(ARM_GPT_SUPPORT),1)
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$(error For PSA_FWU_SUPPORT, ARM_GPT_SUPPORT must be enabled)
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endif
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FWU_MK := drivers/fwu/fwu.mk
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$(info Including ${FWU_MK})
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include ${FWU_MK}
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endif
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ifeq (${ARCH}, aarch64)
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PLAT_INCLUDES += -Iinclude/plat/arm/common/aarch64
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endif
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PLAT_BL_COMMON_SOURCES += plat/arm/common/${ARCH}/arm_helpers.S \
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plat/arm/common/arm_common.c \
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plat/arm/common/arm_console.c
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ifeq (${ARM_XLAT_TABLES_LIB_V1}, 1)
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PLAT_BL_COMMON_SOURCES += lib/xlat_tables/xlat_tables_common.c \
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lib/xlat_tables/${ARCH}/xlat_tables.c
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else
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ifeq (${XLAT_MPU_LIB_V1}, 1)
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include lib/xlat_mpu/xlat_mpu.mk
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PLAT_BL_COMMON_SOURCES += ${XLAT_MPU_LIB_V1_SRCS}
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else
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include lib/xlat_tables_v2/xlat_tables.mk
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PLAT_BL_COMMON_SOURCES += ${XLAT_TABLES_LIB_SRCS}
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endif
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endif
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ARM_IO_SOURCES += plat/arm/common/arm_io_storage.c \
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plat/arm/common/fconf/arm_fconf_io.c
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ifeq (${SPD},spmd)
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ifeq (${BL2_ENABLE_SP_LOAD},1)
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ARM_IO_SOURCES += plat/arm/common/fconf/arm_fconf_sp.c
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endif
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endif
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BL1_SOURCES += drivers/io/io_fip.c \
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drivers/io/io_memmap.c \
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drivers/io/io_storage.c \
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plat/arm/common/arm_bl1_setup.c \
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plat/arm/common/arm_err.c \
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${ARM_IO_SOURCES}
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ifdef EL3_PAYLOAD_BASE
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# Need the plat_arm_program_trusted_mailbox() function to release secondary CPUs from
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# their holding pen
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BL1_SOURCES += plat/arm/common/arm_pm.c
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endif
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BL2_SOURCES += drivers/delay_timer/delay_timer.c \
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drivers/delay_timer/generic_delay_timer.c \
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drivers/io/io_fip.c \
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drivers/io/io_memmap.c \
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drivers/io/io_storage.c \
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plat/arm/common/arm_bl2_setup.c \
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plat/arm/common/arm_err.c \
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common/tf_crc32.c \
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${ARM_IO_SOURCES}
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# Firmware Configuration Framework sources
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include lib/fconf/fconf.mk
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BL1_SOURCES += ${FCONF_SOURCES} ${FCONF_DYN_SOURCES}
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BL2_SOURCES += ${FCONF_SOURCES} ${FCONF_DYN_SOURCES}
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# Add `libfdt` and Arm common helpers required for Dynamic Config
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include lib/libfdt/libfdt.mk
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DYN_CFG_SOURCES += plat/arm/common/arm_dyn_cfg.c \
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plat/arm/common/arm_dyn_cfg_helpers.c \
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common/uuid.c
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DYN_CFG_SOURCES += ${FDT_WRAPPERS_SOURCES}
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BL1_SOURCES += ${DYN_CFG_SOURCES}
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BL2_SOURCES += ${DYN_CFG_SOURCES}
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ifeq (${RESET_TO_BL2},1)
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BL2_SOURCES += plat/arm/common/arm_bl2_el3_setup.c
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endif
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# Because BL1/BL2 execute in AArch64 mode but BL32 in AArch32 we need to use
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# the AArch32 descriptors.
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ifeq (${JUNO_AARCH32_EL3_RUNTIME},1)
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BL2_SOURCES += plat/arm/common/aarch32/arm_bl2_mem_params_desc.c
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else
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ifneq (${PLAT}, corstone1000)
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BL2_SOURCES += plat/arm/common/${ARCH}/arm_bl2_mem_params_desc.c
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endif
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endif
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BL2_SOURCES += plat/arm/common/arm_image_load.c \
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common/desc_image_load.c
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ifeq (${SPD},opteed)
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BL2_SOURCES += lib/optee/optee_utils.c
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endif
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BL2U_SOURCES += drivers/delay_timer/delay_timer.c \
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drivers/delay_timer/generic_delay_timer.c \
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plat/arm/common/arm_bl2u_setup.c
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BL31_SOURCES += plat/arm/common/arm_bl31_setup.c \
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plat/arm/common/arm_pm.c \
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plat/arm/common/arm_topology.c \
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plat/common/plat_psci_common.c
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ifeq (${TRANSFER_LIST}, 1)
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TRANSFER_LIST_SOURCES += plat/arm/common/arm_transfer_list.c
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endif
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ifneq ($(filter 1,${ENABLE_PMF} ${ETHOSN_NPU_DRIVER}),)
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ARM_SVC_HANDLER_SRCS :=
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ifeq (${ENABLE_PMF},1)
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ARM_SVC_HANDLER_SRCS += lib/pmf/pmf_smc.c
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endif
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ifeq (${ETHOSN_NPU_DRIVER},1)
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ARM_SVC_HANDLER_SRCS += plat/arm/common/fconf/fconf_ethosn_getter.c \
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drivers/delay_timer/delay_timer.c \
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drivers/arm/ethosn/ethosn_smc.c
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ifeq (${ETHOSN_NPU_TZMP1},1)
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ARM_SVC_HANDLER_SRCS += drivers/arm/ethosn/ethosn_big_fw.c
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endif
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endif
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ifeq (${ARCH}, aarch64)
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BL31_SOURCES += plat/arm/common/aarch64/execution_state_switch.c\
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plat/arm/common/arm_sip_svc.c \
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plat/arm/common/plat_arm_sip_svc.c \
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${ARM_SVC_HANDLER_SRCS}
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else
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BL32_SOURCES += plat/arm/common/arm_sip_svc.c \
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plat/arm/common/plat_arm_sip_svc.c \
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${ARM_SVC_HANDLER_SRCS}
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endif
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endif
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ifeq (${EL3_EXCEPTION_HANDLING},1)
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BL31_SOURCES += plat/common/aarch64/plat_ehf.c
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endif
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ifeq (${SDEI_SUPPORT},1)
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BL31_SOURCES += plat/arm/common/aarch64/arm_sdei.c
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ifeq (${SDEI_IN_FCONF},1)
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BL31_SOURCES += plat/arm/common/fconf/fconf_sdei_getter.c
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endif
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endif
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# RAS sources
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ifeq (${ENABLE_FEAT_RAS}-${HANDLE_EA_EL3_FIRST_NS},1-1)
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BL31_SOURCES += lib/extensions/ras/std_err_record.c \
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lib/extensions/ras/ras_common.c
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endif
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# Pointer Authentication sources
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ifeq (${ENABLE_PAUTH}, 1)
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PLAT_BL_COMMON_SOURCES += plat/arm/common/aarch64/arm_pauth.c
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endif
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ifeq (${SPD},spmd)
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BL31_SOURCES += plat/common/plat_spmd_manifest.c \
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common/uuid.c \
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${LIBFDT_SRCS}
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BL31_SOURCES += ${FDT_WRAPPERS_SOURCES}
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endif
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ifeq (${DRTM_SUPPORT},1)
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BL31_SOURCES += plat/arm/common/arm_err.c
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endif
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ifneq ($(filter 1,${MEASURED_BOOT} ${TRUSTED_BOARD_BOOT} ${DRTM_SUPPORT}),)
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PLAT_INCLUDES += -Iplat/arm/common \
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-Iinclude/drivers/auth/mbedtls
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# Specify mbed TLS configuration file
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ifeq (${PSA_CRYPTO},1)
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MBEDTLS_CONFIG_FILE ?= "<plat_arm_psa_mbedtls_config.h>"
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else
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MBEDTLS_CONFIG_FILE ?= "<plat_arm_mbedtls_config.h>"
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endif
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endif
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ifneq (${TRUSTED_BOARD_BOOT},0)
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# Include common TBB sources
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AUTH_SOURCES := drivers/auth/auth_mod.c \
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drivers/auth/img_parser_mod.c
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# Include the selected chain of trust sources.
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ifeq (${COT},tbbr)
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BL1_SOURCES += drivers/auth/tbbr/tbbr_cot_common.c \
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drivers/auth/tbbr/tbbr_cot_bl1.c
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ifneq (${COT_DESC_IN_DTB},0)
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BL2_SOURCES += lib/fconf/fconf_cot_getter.c
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else
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# Juno has its own TBBR CoT file for BL2
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ifeq (${PLAT},juno)
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BL2_SOURCES += drivers/auth/tbbr/tbbr_cot_common.c
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endif
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endif
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else ifeq (${COT},dualroot)
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BL1_SOURCES += drivers/auth/dualroot/bl1_cot.c
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ifneq (${COT_DESC_IN_DTB},0)
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BL2_SOURCES += lib/fconf/fconf_cot_getter.c
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endif
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else ifeq (${COT},cca)
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BL1_SOURCES += drivers/auth/cca/bl1_cot.c
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ifneq (${COT_DESC_IN_DTB},0)
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BL2_SOURCES += lib/fconf/fconf_cot_getter.c
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endif
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else
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$(error Unknown chain of trust ${COT})
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endif
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ifeq (${COT_DESC_IN_DTB},0)
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ifeq (${COT},dualroot)
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COTDTPATH := fdts/dualroot_cot_descriptors.dtsi
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else ifeq (${COT},cca)
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COTDTPATH := fdts/cca_cot_descriptors.dtsi
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else ifeq (${COT},tbbr)
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ifneq (${PLAT},juno)
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COTDTPATH := fdts/tbbr_cot_descriptors.dtsi
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endif
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endif
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endif
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BL1_SOURCES += ${AUTH_SOURCES} \
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bl1/tbbr/tbbr_img_desc.c \
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plat/arm/common/arm_bl1_fwu.c \
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plat/common/tbbr/plat_tbbr.c
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BL2_SOURCES += ${AUTH_SOURCES} \
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plat/common/tbbr/plat_tbbr.c
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$(eval $(call TOOL_ADD_IMG,ns_bl2u,--fwu,FWU_))
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IMG_PARSER_LIB_MK := drivers/auth/mbedtls/mbedtls_x509.mk
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$(info Including ${IMG_PARSER_LIB_MK})
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include ${IMG_PARSER_LIB_MK}
|
|
endif
|
|
|
|
# Include Measured Boot makefile before any Crypto library makefile.
|
|
# Crypto library makefile may need default definitions of Measured Boot build
|
|
# flags present in Measured Boot makefile.
|
|
ifneq ($(filter 1,${MEASURED_BOOT} ${DRTM_SUPPORT}),)
|
|
MEASURED_BOOT_MK := drivers/measured_boot/event_log/event_log.mk
|
|
$(info Including ${MEASURED_BOOT_MK})
|
|
include ${MEASURED_BOOT_MK}
|
|
|
|
ifeq (${MEASURED_BOOT},1)
|
|
BL1_SOURCES += ${EVENT_LOG_SOURCES}
|
|
BL2_SOURCES += ${EVENT_LOG_SOURCES}
|
|
endif
|
|
|
|
ifeq (${DRTM_SUPPORT},1)
|
|
BL31_SOURCES += ${EVENT_LOG_SOURCES}
|
|
endif
|
|
endif
|
|
|
|
ifneq ($(filter 1,${MEASURED_BOOT} ${TRUSTED_BOARD_BOOT} ${DRTM_SUPPORT}),)
|
|
CRYPTO_SOURCES := drivers/auth/crypto_mod.c \
|
|
lib/fconf/fconf_tbbr_getter.c
|
|
BL1_SOURCES += ${CRYPTO_SOURCES}
|
|
BL2_SOURCES += ${CRYPTO_SOURCES}
|
|
BL31_SOURCES += drivers/auth/crypto_mod.c
|
|
|
|
# We expect to locate the *.mk files under the directories specified below
|
|
CRYPTO_LIB_MK := drivers/auth/mbedtls/mbedtls_crypto.mk
|
|
|
|
$(info Including ${CRYPTO_LIB_MK})
|
|
include ${CRYPTO_LIB_MK}
|
|
endif
|
|
|
|
ifeq (${RECLAIM_INIT_CODE}, 1)
|
|
ifeq (${ARM_XLAT_TABLES_LIB_V1}, 1)
|
|
$(error To reclaim init code xlat tables v2 must be used)
|
|
endif
|
|
endif
|
|
|
|
ifneq ($(COTDTPATH),)
|
|
cot-dt-defines = IMAGE_BL2 $(BL2_DEFINES) $(PLAT_BL_COMMON_DEFINES)
|
|
cot-dt-include-dirs = $(BL2_INCLUDE_DIRS) $(PLAT_BL_COMMON_INCLUDE_DIRS)
|
|
|
|
cot-dt-cpp-flags = $(cot-dt-defines:%=-D%)
|
|
cot-dt-cpp-flags += $(cot-dt-include-dirs:%=-I%)
|
|
|
|
cot-dt-cpp-flags += $(BL2_CPPFLAGS) $(PLAT_BL_COMMON_CPPFLAGS)
|
|
cot-dt-cpp-flags += $(CPPFLAGS) $(BL_CPPFLAGS) $(TF_CFLAGS_$(ARCH))
|
|
cot-dt-cpp-flags += -c -x assembler-with-cpp -E -P -o $@ $<
|
|
|
|
$(BUILD_PLAT)/$(COTDTPATH:.dtsi=.dts): $(COTDTPATH) | $$(@D)/
|
|
$(q)$($(ARCH)-cpp) $(cot-dt-cpp-flags)
|
|
|
|
$(BUILD_PLAT)/$(COTDTPATH:.dtsi=.c): $(BUILD_PLAT)/$(COTDTPATH:.dtsi=.dts) | $$(@D)/
|
|
$(if $(host-poetry),$(q)poetry -q install)
|
|
$(q)$(if $(host-poetry),poetry run )cot-dt2c convert-to-c $< $@
|
|
|
|
BL2_SOURCES += $(BUILD_PLAT)/$(COTDTPATH:.dtsi=.c)
|
|
endif
|