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cf0b1492ed
This patch introduces the PSCI Library interface. The major changes introduced are as follows: * Earlier BL31 was responsible for Architectural initialization during cold boot via bl31_arch_setup() whereas PSCI was responsible for the same during warm boot. This functionality is now consolidated by the PSCI library and it does Architectural initialization via psci_arch_setup() during both cold and warm boots. * Earlier the warm boot entry point was always `psci_entrypoint()`. This was not flexible enough as a library interface. Now PSCI expects the runtime firmware to provide the entry point via `psci_setup()`. A new function `bl31_warm_entrypoint` is introduced in BL31 and the previous `psci_entrypoint()` is deprecated. * The `smc_helpers.h` is reorganized to separate the SMC Calling Convention defines from the Trusted Firmware SMC helpers. The former is now in a new header file `smcc.h` and the SMC helpers are moved to Architecture specific header. * The CPU context is used by PSCI for context initialization and restoration after power down (PSCI Context). It is also used by BL31 for SMC handling and context management during Normal-Secure world switch (SMC Context). The `psci_smc_handler()` interface is redefined to not use SMC helper macros thus enabling to decouple the PSCI context from EL3 runtime firmware SMC context. This enables PSCI to be integrated with other runtime firmware using a different SMC context. NOTE: With this patch the architectural setup done in `bl31_arch_setup()` is done as part of `psci_setup()` and hence `bl31_platform_setup()` will be invoked prior to architectural setup. It is highly unlikely that the platform setup will depend on architectural setup and cause any failure. Please be be aware of this change in sequence. Change-Id: I7f497a08d33be234bbb822c28146250cb20dab73
253 lines
9.7 KiB
C
253 lines
9.7 KiB
C
/*
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* Copyright (c) 2013-2016, ARM Limited and Contributors. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* Redistributions of source code must retain the above copyright notice, this
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* list of conditions and the following disclaimer.
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*
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* Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* Neither the name of ARM nor the names of its contributors may be used
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* to endorse or promote products derived from this software without specific
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* prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef __PSCI_PRIVATE_H__
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#define __PSCI_PRIVATE_H__
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#include <arch.h>
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#include <bakery_lock.h>
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#include <bl_common.h>
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#include <cpu_data.h>
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#include <pmf.h>
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#include <psci.h>
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#include <spinlock.h>
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/*
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* The following helper macros abstract the interface to the Bakery
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* Lock API.
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*/
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#define psci_lock_init(non_cpu_pd_node, idx) \
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((non_cpu_pd_node)[(idx)].lock_index = (idx))
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#define psci_lock_get(non_cpu_pd_node) \
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bakery_lock_get(&psci_locks[(non_cpu_pd_node)->lock_index])
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#define psci_lock_release(non_cpu_pd_node) \
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bakery_lock_release(&psci_locks[(non_cpu_pd_node)->lock_index])
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/*
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* The PSCI capability which are provided by the generic code but does not
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* depend on the platform or spd capabilities.
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*/
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#define PSCI_GENERIC_CAP \
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(define_psci_cap(PSCI_VERSION) | \
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define_psci_cap(PSCI_AFFINITY_INFO_AARCH64) | \
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define_psci_cap(PSCI_FEATURES))
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/*
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* The PSCI capabilities mask for 64 bit functions.
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*/
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#define PSCI_CAP_64BIT_MASK \
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(define_psci_cap(PSCI_CPU_SUSPEND_AARCH64) | \
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define_psci_cap(PSCI_CPU_ON_AARCH64) | \
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define_psci_cap(PSCI_AFFINITY_INFO_AARCH64) | \
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define_psci_cap(PSCI_MIG_AARCH64) | \
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define_psci_cap(PSCI_MIG_INFO_UP_CPU_AARCH64) | \
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define_psci_cap(PSCI_SYSTEM_SUSPEND_AARCH64) | \
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define_psci_cap(PSCI_STAT_RESIDENCY_AARCH64) | \
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define_psci_cap(PSCI_STAT_COUNT_AARCH64))
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/*
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* Helper macros to get/set the fields of PSCI per-cpu data.
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*/
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#define psci_set_aff_info_state(aff_state) \
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set_cpu_data(psci_svc_cpu_data.aff_info_state, aff_state)
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#define psci_get_aff_info_state() \
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get_cpu_data(psci_svc_cpu_data.aff_info_state)
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#define psci_get_aff_info_state_by_idx(idx) \
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get_cpu_data_by_index(idx, psci_svc_cpu_data.aff_info_state)
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#define psci_set_aff_info_state_by_idx(idx, aff_state) \
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set_cpu_data_by_index(idx, psci_svc_cpu_data.aff_info_state,\
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aff_state)
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#define psci_get_suspend_pwrlvl() \
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get_cpu_data(psci_svc_cpu_data.target_pwrlvl)
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#define psci_set_suspend_pwrlvl(target_lvl) \
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set_cpu_data(psci_svc_cpu_data.target_pwrlvl, target_lvl)
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#define psci_set_cpu_local_state(state) \
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set_cpu_data(psci_svc_cpu_data.local_state, state)
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#define psci_get_cpu_local_state() \
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get_cpu_data(psci_svc_cpu_data.local_state)
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#define psci_get_cpu_local_state_by_idx(idx) \
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get_cpu_data_by_index(idx, psci_svc_cpu_data.local_state)
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/*
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* Helper macros for the CPU level spinlocks
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*/
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#define psci_spin_lock_cpu(idx) spin_lock(&psci_cpu_pd_nodes[idx].cpu_lock)
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#define psci_spin_unlock_cpu(idx) spin_unlock(&psci_cpu_pd_nodes[idx].cpu_lock)
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/* Helper macro to identify a CPU standby request in PSCI Suspend call */
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#define is_cpu_standby_req(is_power_down_state, retn_lvl) \
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(((!(is_power_down_state)) && ((retn_lvl) == 0)) ? 1 : 0)
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/* Following are used as ID's to capture time-stamp */
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#define PSCI_STAT_ID_ENTER_LOW_PWR 0
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#define PSCI_STAT_ID_EXIT_LOW_PWR 1
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#define PSCI_STAT_TOTAL_IDS 2
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/* Declare PMF service functions for PSCI */
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PMF_DECLARE_CAPTURE_TIMESTAMP(psci_svc)
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PMF_DECLARE_GET_TIMESTAMP(psci_svc)
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/*******************************************************************************
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* The following two data structures implement the power domain tree. The tree
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* is used to track the state of all the nodes i.e. power domain instances
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* described by the platform. The tree consists of nodes that describe CPU power
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* domains i.e. leaf nodes and all other power domains which are parents of a
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* CPU power domain i.e. non-leaf nodes.
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******************************************************************************/
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typedef struct non_cpu_pwr_domain_node {
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/*
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* Index of the first CPU power domain node level 0 which has this node
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* as its parent.
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*/
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unsigned int cpu_start_idx;
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/*
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* Number of CPU power domains which are siblings of the domain indexed
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* by 'cpu_start_idx' i.e. all the domains in the range 'cpu_start_idx
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* -> cpu_start_idx + ncpus' have this node as their parent.
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*/
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unsigned int ncpus;
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/*
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* Index of the parent power domain node.
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* TODO: Figure out whether to whether using pointer is more efficient.
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*/
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unsigned int parent_node;
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plat_local_state_t local_state;
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unsigned char level;
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/* For indexing the psci_lock array*/
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unsigned char lock_index;
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} non_cpu_pd_node_t;
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typedef struct cpu_pwr_domain_node {
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u_register_t mpidr;
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/*
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* Index of the parent power domain node.
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* TODO: Figure out whether to whether using pointer is more efficient.
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*/
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unsigned int parent_node;
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/*
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* A CPU power domain does not require state coordination like its
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* parent power domains. Hence this node does not include a bakery
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* lock. A spinlock is required by the CPU_ON handler to prevent a race
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* when multiple CPUs try to turn ON the same target CPU.
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*/
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spinlock_t cpu_lock;
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} cpu_pd_node_t;
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/*******************************************************************************
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* Data prototypes
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******************************************************************************/
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extern const plat_psci_ops_t *psci_plat_pm_ops;
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extern non_cpu_pd_node_t psci_non_cpu_pd_nodes[PSCI_NUM_NON_CPU_PWR_DOMAINS];
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extern cpu_pd_node_t psci_cpu_pd_nodes[PLATFORM_CORE_COUNT];
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extern unsigned int psci_caps;
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/* One bakery lock is required for each non-cpu power domain */
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DECLARE_BAKERY_LOCK(psci_locks[PSCI_NUM_NON_CPU_PWR_DOMAINS]);
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/*******************************************************************************
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* SPD's power management hooks registered with PSCI
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******************************************************************************/
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extern const spd_pm_ops_t *psci_spd_pm;
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/*******************************************************************************
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* Function prototypes
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******************************************************************************/
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/* Private exported functions from psci_common.c */
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int psci_validate_power_state(unsigned int power_state,
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psci_power_state_t *state_info);
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void psci_query_sys_suspend_pwrstate(psci_power_state_t *state_info);
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int psci_validate_mpidr(u_register_t mpidr);
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void psci_init_req_local_pwr_states(void);
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int psci_validate_entry_point(entry_point_info_t *ep,
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uintptr_t entrypoint, u_register_t context_id);
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void psci_get_parent_pwr_domain_nodes(unsigned int cpu_idx,
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unsigned int end_lvl,
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unsigned int node_index[]);
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void psci_do_state_coordination(unsigned int end_pwrlvl,
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psci_power_state_t *state_info);
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void psci_acquire_pwr_domain_locks(unsigned int end_pwrlvl,
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unsigned int cpu_idx);
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void psci_release_pwr_domain_locks(unsigned int end_pwrlvl,
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unsigned int cpu_idx);
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int psci_validate_suspend_req(const psci_power_state_t *state_info,
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unsigned int is_power_down_state_req);
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unsigned int psci_find_max_off_lvl(const psci_power_state_t *state_info);
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unsigned int psci_find_target_suspend_lvl(const psci_power_state_t *state_info);
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void psci_set_pwr_domains_to_run(unsigned int end_pwrlvl);
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void psci_print_power_domain_map(void);
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unsigned int psci_is_last_on_cpu(void);
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int psci_spd_migrate_info(u_register_t *mpidr);
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/* Private exported functions from psci_on.c */
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int psci_cpu_on_start(u_register_t target_cpu,
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entry_point_info_t *ep);
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void psci_cpu_on_finish(unsigned int cpu_idx,
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psci_power_state_t *state_info);
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/* Private exported functions from psci_off.c */
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int psci_do_cpu_off(unsigned int end_pwrlvl);
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/* Private exported functions from psci_suspend.c */
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void psci_cpu_suspend_start(entry_point_info_t *ep,
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unsigned int end_pwrlvl,
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psci_power_state_t *state_info,
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unsigned int is_power_down_state_req);
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void psci_cpu_suspend_finish(unsigned int cpu_idx,
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psci_power_state_t *state_info);
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/* Private exported functions from psci_helpers.S */
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void psci_do_pwrdown_cache_maintenance(unsigned int pwr_level);
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void psci_do_pwrup_cache_maintenance(void);
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/* Private exported functions from psci_system_off.c */
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void __dead2 psci_system_off(void);
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void __dead2 psci_system_reset(void);
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/* Private exported functions from psci_stat.c */
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void psci_stats_update_pwr_down(unsigned int end_pwrlvl,
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const psci_power_state_t *state_info);
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void psci_stats_update_pwr_up(unsigned int end_pwrlvl,
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const psci_power_state_t *state_info,
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unsigned int flags);
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u_register_t psci_stat_residency(u_register_t target_cpu,
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unsigned int power_state);
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u_register_t psci_stat_count(u_register_t target_cpu,
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unsigned int power_state);
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#endif /* __PSCI_PRIVATE_H__ */
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