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https://github.com/ARM-software/arm-trusted-firmware.git
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cf0a75f04d
The Qualcomm Snapdragon 210 (MSM8909) SoC is very similar to the existing MSM8916, except for: - ARM Cortex-A7 instead of Cortex-A53 (AArch32-only) - MMU-500 r2p0 instead of r0p0 (need to clear CACHE_LOCK bit) - Different default BL31 address and UART number Make the existing MSM8916 platform port usable for MSM8909 as well by adding some minimal if statements where necessary plus the platform make files for msm8909. Change-Id: I8eca5bd8f2486cc2174562fb5de28f8dffa0d874 Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
92 lines
2.6 KiB
Makefile
92 lines
2.6 KiB
Makefile
#
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# Copyright (c) 2021-2023, Stephan Gerhold <stephan@gerhold.net>
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#
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# SPDX-License-Identifier: BSD-3-Clause
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#
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include drivers/arm/gic/v2/gicv2.mk
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include lib/xlat_tables_v2/xlat_tables.mk
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PLAT_BL_COMMON_SOURCES := ${GICV2_SOURCES} \
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${XLAT_TABLES_LIB_SRCS} \
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drivers/delay_timer/delay_timer.c \
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drivers/delay_timer/generic_delay_timer.c \
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plat/common/plat_gicv2.c \
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plat/qti/msm8916/msm8916_gicv2.c \
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plat/qti/msm8916/msm8916_setup.c \
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plat/qti/msm8916/${ARCH}/msm8916_helpers.S \
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plat/qti/msm8916/${ARCH}/uartdm_console.S
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MSM8916_CPU := $(if ${ARM_CORTEX_A7},cortex_a7,cortex_a53)
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MSM8916_PM_SOURCES := lib/cpus/${ARCH}/${MSM8916_CPU}.S \
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plat/common/plat_psci_common.c \
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plat/qti/msm8916/msm8916_config.c \
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plat/qti/msm8916/msm8916_cpu_boot.c \
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plat/qti/msm8916/msm8916_pm.c \
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plat/qti/msm8916/msm8916_topology.c
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BL31_SOURCES += ${MSM8916_PM_SOURCES} \
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plat/qti/msm8916/msm8916_bl31_setup.c
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PLAT_INCLUDES := -Iplat/qti/msm8916/include
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ifeq (${ARCH},aarch64)
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# arm_macros.S exists only on aarch64 currently
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PLAT_INCLUDES += -Iinclude/plat/arm/common/${ARCH}
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endif
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# Only BL31 is supported at the moment and is entered on a single CPU
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RESET_TO_BL31 := 1
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COLD_BOOT_SINGLE_CPU := 1
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# Have different sections for code and rodata
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SEPARATE_CODE_AND_RODATA := 1
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# Single cluster
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WARMBOOT_ENABLE_DCACHE_EARLY := 1
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# Disable features unsupported in ARMv8.0
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ENABLE_SPE_FOR_NS := 0
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ENABLE_SVE_FOR_NS := 0
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# Disable workarounds unnecessary for Cortex-A7/A53
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WORKAROUND_CVE_2017_5715 := 0
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WORKAROUND_CVE_2022_23960 := 0
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ifeq (${MSM8916_CPU},cortex_a53)
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# MSM8916 uses ARM Cortex-A53 r0p0 so likely all the errata apply
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ERRATA_A53_819472 := 1
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ERRATA_A53_824069 := 1
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ERRATA_A53_826319 := 1
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ERRATA_A53_827319 := 1
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ERRATA_A53_835769 := 1
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ERRATA_A53_836870 := 1
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ERRATA_A53_843419 := 1
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ERRATA_A53_855873 := 0 # Workaround works only for >= r0p3
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ERRATA_A53_1530924 := 1
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endif
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# Build config flags
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# ------------------
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BL31_BASE ?= 0x86500000
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PRELOADED_BL33_BASE ?= 0x8f600000
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ifeq (${ARCH},aarch64)
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BL32_BASE ?= BL31_LIMIT
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$(eval $(call add_define,BL31_BASE))
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else
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# There is no BL31 on aarch32, so reuse its location for BL32
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BL32_BASE ?= $(BL31_BASE)
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endif
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$(eval $(call add_define,BL32_BASE))
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# UART number to use for TF-A output during early boot
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QTI_UART_NUM ?= 2
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$(eval $(call assert_numeric,QTI_UART_NUM))
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$(eval $(call add_define,QTI_UART_NUM))
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# Set to 1 on the command line to keep using UART after early boot.
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# Requires reserving the UART and related clocks inside the normal world.
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QTI_RUNTIME_UART ?= 0
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$(eval $(call assert_boolean,QTI_RUNTIME_UART))
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$(eval $(call add_define,QTI_RUNTIME_UART))
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