mirror of
https://github.com/ARM-software/arm-trusted-firmware.git
synced 2025-04-16 09:34:18 +00:00

ARMv8.4-TTST (Small Translation tables) relaxes the lower limit on the size of translation tables by increasing the maximum permitted value of the T1SZ and T0SZ fields in TCR_EL1, TCR_EL2, TCR_EL3, VTCR_EL2 and VSTCR_EL2. This feature is supported in AArch64 state only. This patch adds support for this feature to both versions of the translation tables library. It also removes the static build time checks for virtual address space size checks to runtime assertions. Change-Id: I4e8cebc197ec1c2092dc7d307486616786e6c093 Signed-off-by: Sathees Balya <sathees.balya@arm.com>
31 lines
778 B
C
31 lines
778 B
C
/*
|
|
* Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
|
|
*
|
|
* SPDX-License-Identifier: BSD-3-Clause
|
|
*/
|
|
|
|
#ifndef XLAT_TABLES_ARCH_H
|
|
#define XLAT_TABLES_ARCH_H
|
|
|
|
#ifdef AARCH32
|
|
#include "aarch32/xlat_tables_aarch32.h"
|
|
#else
|
|
#include "aarch64/xlat_tables_aarch64.h"
|
|
#endif
|
|
|
|
/*
|
|
* Evaluates to 1 if the given physical address space size is a power of 2,
|
|
* or 0 if it's not.
|
|
*/
|
|
#define CHECK_PHY_ADDR_SPACE_SIZE(size) \
|
|
(IS_POWER_OF_TWO(size))
|
|
|
|
/*
|
|
* Compute the number of entries required at the initial lookup level to address
|
|
* the whole virtual address space.
|
|
*/
|
|
#define GET_NUM_BASE_LEVEL_ENTRIES(addr_space_size) \
|
|
((addr_space_size) >> \
|
|
XLAT_ADDR_SHIFT(GET_XLAT_TABLE_LEVEL_BASE(addr_space_size)))
|
|
|
|
#endif /* XLAT_TABLES_ARCH_H */
|