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ae84525f44
This feature is enabled by default using STM32MP_DDR_FIP_IO_STORAGE. DDR firmware binary is loaded from FIP to SRAM1 which needs to be mapped. Only half of the SRAM1 will be allocated to TF-A. RISAB3 has to be configured to allow access to SRAM1. Add image ID and update maximum number on platform side also. Fill related descriptor information, add policy and update numbers. DDR_TYPE variable is used to identify binary file, and image is now added in the fiptool command line. The DDR PHY firmware is not in TF-A repository. It can be found at https://github.com/STMicroelectronics/stm32-ddr-phy-binary To ease the selection of the firmware path, STM32MP_DDR_FW_PATH is added to platform.mk file. Change-Id: I09ab0a5c63406055a7b5ccd16d65e443de47ca2f Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com> Signed-off-by: Yann Gautier <yann.gautier@st.com> Signed-off-by: Maxime Méré <maxime.mere@foss.st.com>
167 lines
4.5 KiB
Makefile
167 lines
4.5 KiB
Makefile
#
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# Copyright (c) 2023-2024, STMicroelectronics - All Rights Reserved
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#
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# SPDX-License-Identifier: BSD-3-Clause
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#
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# Extra partitions used to find FIP, contains:
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# metadata (2) and fsbl-m (2) and the FIP partitions (default is 2).
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STM32_EXTRA_PARTS := 6
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include plat/st/common/common.mk
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CRASH_REPORTING := 1
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ENABLE_PIE := 1
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PROGRAMMABLE_RESET_ADDRESS := 1
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BL2_IN_XIP_MEM := 1
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# Default Device tree
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DTB_FILE_NAME ?= stm32mp257f-ev1.dtb
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STM32MP25 := 1
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# STM32 image header version v2.2
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STM32_HEADER_VERSION_MAJOR := 2
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STM32_HEADER_VERSION_MINOR := 2
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# Set load address for serial boot devices
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DWL_BUFFER_BASE ?= 0x87000000
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# DDR types
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STM32MP_DDR3_TYPE ?= 0
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STM32MP_DDR4_TYPE ?= 0
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STM32MP_LPDDR4_TYPE ?= 0
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ifeq (${STM32MP_DDR3_TYPE},1)
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DDR_TYPE := ddr3
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endif
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ifeq (${STM32MP_DDR4_TYPE},1)
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DDR_TYPE := ddr4
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endif
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ifeq (${STM32MP_LPDDR4_TYPE},1)
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DDR_TYPE := lpddr4
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endif
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# DDR features
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STM32MP_DDR_FIP_IO_STORAGE := 1
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# Device tree
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BL2_DTSI := stm32mp25-bl2.dtsi
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FDT_SOURCES := $(addprefix ${BUILD_PLAT}/fdts/, $(patsubst %.dtb,%-bl2.dts,$(DTB_FILE_NAME)))
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# Macros and rules to build TF binary
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STM32_TF_STM32 := $(addprefix ${BUILD_PLAT}/tf-a-, $(patsubst %.dtb,%.stm32,$(DTB_FILE_NAME)))
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STM32_LD_FILE := plat/st/stm32mp2/${ARCH}/stm32mp2.ld.S
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STM32_BINARY_MAPPING := plat/st/stm32mp2/${ARCH}/stm32mp2.S
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STM32MP_FW_CONFIG_NAME := $(patsubst %.dtb,%-fw-config.dtb,$(DTB_FILE_NAME))
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STM32MP_FW_CONFIG := ${BUILD_PLAT}/fdts/$(STM32MP_FW_CONFIG_NAME)
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ifeq (${STM32MP_DDR_FIP_IO_STORAGE},1)
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STM32MP_DDR_FW_PATH ?= drivers/st/ddr/phy/firmware/bin/stm32mp2
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STM32MP_DDR_FW_NAME := ${DDR_TYPE}_pmu_train.bin
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STM32MP_DDR_FW := ${STM32MP_DDR_FW_PATH}/${STM32MP_DDR_FW_NAME}
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endif
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FDT_SOURCES += $(addprefix fdts/, $(patsubst %.dtb,%.dts,$(STM32MP_FW_CONFIG_NAME)))
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# Add the FW_CONFIG to FIP and specify the same to certtool
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$(eval $(call TOOL_ADD_PAYLOAD,${STM32MP_FW_CONFIG},--fw-config))
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ifeq (${STM32MP_DDR_FIP_IO_STORAGE},1)
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# Add the FW_DDR to FIP and specify the same to certtool
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$(eval $(call TOOL_ADD_IMG,STM32MP_DDR_FW,--ddr-fw))
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endif
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# Enable flags for C files
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$(eval $(call assert_booleans,\
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$(sort \
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STM32MP_DDR_FIP_IO_STORAGE \
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STM32MP_DDR3_TYPE \
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STM32MP_DDR4_TYPE \
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STM32MP_LPDDR4_TYPE \
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STM32MP25 \
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)))
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$(eval $(call assert_numerics,\
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$(sort \
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PLAT_PARTITION_MAX_ENTRIES \
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STM32_HEADER_VERSION_MAJOR \
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STM32_TF_A_COPIES \
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)))
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$(eval $(call add_defines,\
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$(sort \
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DWL_BUFFER_BASE \
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PLAT_DEF_FIP_UUID \
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PLAT_PARTITION_MAX_ENTRIES \
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PLAT_TBBR_IMG_DEF \
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STM32_TF_A_COPIES \
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STM32MP_DDR_FIP_IO_STORAGE \
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STM32MP_DDR3_TYPE \
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STM32MP_DDR4_TYPE \
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STM32MP_LPDDR4_TYPE \
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STM32MP25 \
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)))
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# STM32MP2x is based on Cortex-A35, which is Armv8.0, and does not support BTI
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# Disable mbranch-protection to avoid adding useless code
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TF_CFLAGS += -mbranch-protection=none
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# Include paths and source files
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PLAT_INCLUDES += -Iplat/st/stm32mp2/include/
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PLAT_BL_COMMON_SOURCES += lib/cpus/${ARCH}/cortex_a35.S
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PLAT_BL_COMMON_SOURCES += drivers/st/uart/${ARCH}/stm32_console.S
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PLAT_BL_COMMON_SOURCES += plat/st/stm32mp2/${ARCH}/stm32mp2_helper.S
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PLAT_BL_COMMON_SOURCES += plat/st/stm32mp2/stm32mp2_private.c
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PLAT_BL_COMMON_SOURCES += drivers/st/bsec/bsec3.c \
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drivers/st/reset/stm32mp2_reset.c \
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plat/st/stm32mp2/stm32mp2_syscfg.c
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PLAT_BL_COMMON_SOURCES += drivers/st/clk/clk-stm32-core.c \
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drivers/st/clk/clk-stm32mp2.c
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BL2_SOURCES += plat/st/stm32mp2/plat_bl2_mem_params_desc.c
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BL2_SOURCES += plat/st/stm32mp2/bl2_plat_setup.c
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ifneq ($(filter 1,${STM32MP_EMMC} ${STM32MP_SDMMC}),)
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BL2_SOURCES += drivers/st/mmc/stm32_sdmmc2.c
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endif
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ifeq (${STM32MP_USB_PROGRAMMER},1)
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BL2_SOURCES += plat/st/stm32mp2/stm32mp2_usb_dfu.c
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endif
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BL2_SOURCES += drivers/st/ddr/stm32mp2_ddr_helpers.c
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# BL31 sources
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BL31_SOURCES += ${FDT_WRAPPERS_SOURCES}
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BL31_SOURCES += plat/st/stm32mp2/bl31_plat_setup.c \
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plat/st/stm32mp2/stm32mp2_pm.c \
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plat/st/stm32mp2/stm32mp2_topology.c
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# Generic GIC v2
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include drivers/arm/gic/v2/gicv2.mk
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BL31_SOURCES += ${GICV2_SOURCES} \
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plat/common/plat_gicv2.c \
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plat/st/common/stm32mp_gic.c
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# Generic PSCI
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BL31_SOURCES += plat/common/plat_psci_common.c
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# Compilation rules
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.PHONY: check_ddr_type
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.SUFFIXES:
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bl2: check_ddr_type
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check_ddr_type:
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$(eval DDR_TYPE = $(shell echo $$(($(STM32MP_DDR3_TYPE) + \
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$(STM32MP_DDR4_TYPE) + \
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$(STM32MP_LPDDR4_TYPE)))))
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@if [ ${DDR_TYPE} != 1 ]; then \
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echo "One and only one DDR type must be defined"; \
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false; \
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fi
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include plat/st/common/common_rules.mk
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