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https://github.com/ARM-software/arm-trusted-firmware.git
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ae84525f44
This feature is enabled by default using STM32MP_DDR_FIP_IO_STORAGE. DDR firmware binary is loaded from FIP to SRAM1 which needs to be mapped. Only half of the SRAM1 will be allocated to TF-A. RISAB3 has to be configured to allow access to SRAM1. Add image ID and update maximum number on platform side also. Fill related descriptor information, add policy and update numbers. DDR_TYPE variable is used to identify binary file, and image is now added in the fiptool command line. The DDR PHY firmware is not in TF-A repository. It can be found at https://github.com/STMicroelectronics/stm32-ddr-phy-binary To ease the selection of the firmware path, STM32MP_DDR_FW_PATH is added to platform.mk file. Change-Id: I09ab0a5c63406055a7b5ccd16d65e443de47ca2f Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com> Signed-off-by: Yann Gautier <yann.gautier@st.com> Signed-off-by: Maxime Méré <maxime.mere@foss.st.com>
55 lines
1.4 KiB
C
55 lines
1.4 KiB
C
/*
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* Copyright (c) 2024, STMicroelectronics - All Rights Reserved
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef PLAT_TBBR_IMG_DEF_H
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#define PLAT_TBBR_IMG_DEF_H
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#include <export/common/tbbr/tbbr_img_def_exp.h>
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/* Undef the existing values */
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#undef BKUP_FWU_METADATA_IMAGE_ID
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#undef FWU_METADATA_IMAGE_ID
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#undef FW_CONFIG_ID
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#undef ENC_IMAGE_ID
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#undef GPT_IMAGE_ID
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#undef NT_FW_CONFIG_ID
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#undef SOC_FW_CONFIG_ID
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#undef TB_FW_CONFIG_ID
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#undef HW_CONFIG_ID
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#undef TRUSTED_BOOT_FW_CERT_ID
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#undef SOC_FW_CONTENT_CERT_ID
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#undef BL32_EXTRA1_IMAGE_ID
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#undef TOS_FW_CONFIG_ID
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/* Define the STM32MP2 used ID */
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#define FW_CONFIG_ID U(1)
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#define HW_CONFIG_ID U(2)
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#define ENC_IMAGE_ID U(6)
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#define BL32_EXTRA1_IMAGE_ID U(8)
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#define FWU_METADATA_IMAGE_ID U(12)
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#define BKUP_FWU_METADATA_IMAGE_ID U(13)
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#define TOS_FW_CONFIG_ID U(16)
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#define NT_FW_CONFIG_ID U(18)
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#define SOC_FW_CONFIG_ID U(19)
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#define TB_FW_CONFIG_ID U(20)
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#define TRUSTED_BOOT_FW_CERT_ID U(21)
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#define SOC_FW_CONTENT_CERT_ID U(23)
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#define STM32MP_CONFIG_CERT_ID U(24)
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#define GPT_IMAGE_ID U(25)
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#if STM32MP_DDR_FIP_IO_STORAGE
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#define DDR_FW_ID U(26)
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/* Increase the MAX_NUMBER_IDS to match the authentication pool required */
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#define MAX_NUMBER_IDS U(27)
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#else
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/* Increase the MAX_NUMBER_IDS to match the authentication pool required */
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#define MAX_NUMBER_IDS U(26)
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#endif
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#endif /* PLAT_TBBR_IMG_DEF_H */
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