johpow01 cb4ec47b5c feat(hcx): add build option to enable FEAT_HCX ... FEAT_HCX adds the extended hypervisor configuration register (HCRX_EL2) and access to this register must be explicitly enabled through the SCR_EL3.HXEn bit. This patch adds a new build flag ENABLE_FEAT_HCX to allow the register to be accessed from EL2. Signed-off-by: John Powell <john.powell@arm.com> Change-Id: Ibb36ad90622f1dc857adab4b0d4d7a89456a522b		2021-09-27 17:07:52 +02:00
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aarch64	Fix exception handlers in BL31: Use DSB to synchronize pending EA	2021-01-29 10:30:18 -06:00
bl31.ld.S	Increase type widths to satisfy width requirements	2020-10-12 10:55:03 -05:00
bl31.mk	feat(trf): enable trace filter control register access from lower NS EL	2021-08-26 09:32:35 +01:00
bl31_context_mgmt.c	Coverity: remove unnecessary header file includes	2020-02-04 10:23:51 -06:00
bl31_main.c	feat(hcx): add build option to enable FEAT_HCX	2021-09-27 17:07:52 +02:00
ehf.c	Minor changes to documentation and comments	2019-02-28 13:35:21 +00:00
interrupt_mgmt.c	Use correct type when reading SCR register	2020-01-28 11:10:48 +00:00