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https://github.com/ARM-software/arm-trusted-firmware.git
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caa84939a4
This patch uses the reworked exception handling support to handle runtime service requests through SMCs following the SMC calling convention. This is a giant commit since all the changes are inter-related. It does the following: 1. Replace the old exception handling mechanism with the new one 2. Enforce that SP_EL0 is used C runtime stacks. 3. Ensures that the cold and warm boot paths use the 'cpu_context' structure to program an ERET into the next lower EL. 4. Ensures that SP_EL3 always points to the next 'cpu_context' structure prior to an ERET into the next lower EL 5. Introduces a PSCI SMC handler which completes the use of PSCI as a runtime service Change-Id: I661797f834c0803d2c674d20f504df1b04c2b852 Co-authored-by: Achin Gupta <achin.gupta@arm.com>
105 lines
3.8 KiB
C
105 lines
3.8 KiB
C
/*
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* Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* Redistributions of source code must retain the above copyright notice, this
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* list of conditions and the following disclaimer.
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*
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* Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* Neither the name of ARM nor the names of its contributors may be used
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* to endorse or promote products derived from this software without specific
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* prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <stdio.h>
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#include <string.h>
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#include <assert.h>
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#include <arch_helpers.h>
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#include <console.h>
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#include <platform.h>
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#include <semihosting.h>
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#include <bl_common.h>
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#include <bl31.h>
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#include <runtime_svc.h>
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#include <context_mgmt.h>
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/*******************************************************************************
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* Simple function to initialise all BL31 helper libraries.
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******************************************************************************/
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void bl31_lib_init()
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{
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cm_init();
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}
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/*******************************************************************************
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* BL31 is responsible for setting up the runtime services for the primary cpu
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* before passing control to the bootloader (UEFI) or Linux. This function calls
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* runtime_svc_init() which initializes all registered runtime services. The run
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* time services would setup enough context for the core to swtich to the next
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* exception level. When this function returns, the core will switch to the
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* programmed exception level via. an ERET.
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******************************************************************************/
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void bl31_main(void)
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{
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el_change_info *next_image_info;
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uint32_t scr;
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/* Perform remaining generic architectural setup from EL3 */
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bl31_arch_setup();
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/* Perform platform setup in BL1 */
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bl31_platform_setup();
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#if defined (__GNUC__)
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printf("BL31 Built : %s, %s\n\r", __TIME__, __DATE__);
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#endif
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/* Initialise helper libraries */
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bl31_lib_init();
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/* Initialize the runtime services e.g. psci */
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runtime_svc_init();
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/* Clean caches before re-entering normal world */
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dcsw_op_all(DCCSW);
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/*
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* Setup minimal architectural state of the next highest EL to
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* allow execution in it immediately upon entering it.
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*/
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bl31_arch_next_el_setup();
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/* Program EL3 registers to enable entry into the next EL */
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next_image_info = bl31_get_next_image_info();
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scr = read_scr();
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if (next_image_info->security_state == NON_SECURE)
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scr |= SCR_NS_BIT;
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/*
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* Tell the context mgmt. library to ensure that SP_EL3 points to
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* the right context to exit from EL3 correctly.
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*/
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cm_set_el3_eret_context(next_image_info->security_state,
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next_image_info->entrypoint,
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next_image_info->spsr,
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scr);
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/* Finally set the next context */
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cm_set_next_eret_context(next_image_info->security_state);
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}
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