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https://github.com/ARM-software/arm-trusted-firmware.git
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b0980e5843
Adds a dispatcher for ProvenCore based on the test secure payload dispatcher. Signed-off-by: Florian Lugou <florian.lugou@provenrun.com> Change-Id: I978afc3af6a6f65791655685a7bc80070673c9f3
79 lines
2.8 KiB
C
79 lines
2.8 KiB
C
/*
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* Copyright (c) 2021-2022, ARM Limited and Contributors. All rights reserved.
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* Portions copyright (c) 2021-2022, ProvenRun S.A.S. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef __PNCD_PRIVATE_H__
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#define __PNCD_PRIVATE_H__
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#ifndef __ASSEMBLER__
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#include <stdint.h>
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#endif /* __ASSEMBLER __ */
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#include <context.h>
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#ifndef __ASSEMBLER__
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#include <lib/cassert.h>
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#endif /* __ASSEMBLER __ */
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#include <platform_def.h>
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/*******************************************************************************
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* Constants that allow assembler code to preserve callee-saved registers of the
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* C runtime context while performing a security state switch.
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******************************************************************************/
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#define PNCD_C_RT_CTX_X19 U(0x0)
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#define PNCD_C_RT_CTX_X20 U(0x8)
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#define PNCD_C_RT_CTX_X21 U(0x10)
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#define PNCD_C_RT_CTX_X22 U(0x18)
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#define PNCD_C_RT_CTX_X23 U(0x20)
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#define PNCD_C_RT_CTX_X24 U(0x28)
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#define PNCD_C_RT_CTX_X25 U(0x30)
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#define PNCD_C_RT_CTX_X26 U(0x38)
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#define PNCD_C_RT_CTX_X27 U(0x40)
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#define PNCD_C_RT_CTX_X28 U(0x48)
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#define PNCD_C_RT_CTX_X29 U(0x50)
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#define PNCD_C_RT_CTX_X30 U(0x58)
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#define PNCD_C_RT_CTX_SIZE U(0x60)
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#define PNCD_C_RT_CTX_ENTRIES (PNCD_C_RT_CTX_SIZE >> DWORD_SHIFT)
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#ifndef __ASSEMBLER__
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/* AArch64 callee saved general purpose register context structure. */
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DEFINE_REG_STRUCT(c_rt_regs, PNCD_C_RT_CTX_ENTRIES);
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/*
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* Compile time assertion to ensure that both the compiler and linker
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* have the same double word aligned view of the size of the C runtime
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* register context.
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*/
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CASSERT(sizeof(c_rt_regs_t) == PNCD_C_RT_CTX_SIZE,
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assert_spd_c_rt_regs_size_mismatch);
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/*******************************************************************************
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* Structure which helps the SPD to maintain the per-cpu state of the SP.
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* 'mpidr' - mpidr of the CPU running PNC
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* 'c_rt_ctx' - stack address to restore C runtime context from after
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* returning from a synchronous entry into the SP.
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* 'cpu_ctx' - space to maintain SP architectural state
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******************************************************************************/
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typedef struct pnc_context {
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uint64_t mpidr;
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uint64_t c_rt_ctx;
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cpu_context_t cpu_ctx;
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} pnc_context_t;
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/*******************************************************************************
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* Function & Data prototypes
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******************************************************************************/
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uint64_t pncd_enter_sp(uint64_t *c_rt_ctx);
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void __dead2 pncd_exit_sp(uint64_t c_rt_ctx, uint64_t ret);
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uint64_t pncd_synchronous_sp_entry(pnc_context_t *pnc_ctx);
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void __dead2 pncd_synchronous_sp_exit(pnc_context_t *pnc_ctx, uint64_t ret);
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void pncd_init_pnc_ep_state(struct entry_point_info *pnc_ep,
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uint64_t pc,
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pnc_context_t *pnc_ctx);
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#endif /* __ASSEMBLER__ */
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#endif /* __PNCD_PRIVATE_H__ */
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