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https://github.com/ARM-software/arm-trusted-firmware.git
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a9b64ed969
Change-Id: I662c0b35e938f8b2013ec60f863de55445f559da Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>
104 lines
3.4 KiB
C
104 lines
3.4 KiB
C
/*
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* Copyright (c) 2021-2022, ProvenRun S.A.S. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <assert.h>
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#include <string.h>
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#include <arch_helpers.h>
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#include <common/bl_common.h>
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#include <common/debug.h>
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#include <lib/el3_runtime/context_mgmt.h>
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#include <lib/utils.h>
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#include <plat/common/platform.h>
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#include "pncd_private.h"
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/*******************************************************************************
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* Given a secure payload entrypoint info pointer, entry point PC & pointer to a
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* context data structure, this function will initialize pnc context and entry
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* point info for the secure payload
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******************************************************************************/
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void pncd_init_pnc_ep_state(struct entry_point_info *pnc_entry_point,
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uint64_t pc,
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pnc_context_t *pnc_ctx)
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{
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uint32_t ep_attr;
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/* Passing a NULL context is a critical programming error */
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assert(pnc_ctx);
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assert(pnc_entry_point);
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assert(pc);
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/* Associate this context with the current cpu */
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pnc_ctx->mpidr = read_mpidr();
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cm_set_context(&pnc_ctx->cpu_ctx, SECURE);
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/* initialise an entrypoint to set up the CPU context */
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ep_attr = SECURE | EP_ST_ENABLE;
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if (read_sctlr_el3() & SCTLR_EE_BIT) {
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ep_attr |= EP_EE_BIG;
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}
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SET_PARAM_HEAD(pnc_entry_point, PARAM_EP, VERSION_1, ep_attr);
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pnc_entry_point->pc = pc;
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pnc_entry_point->spsr = SPSR_64(MODE_EL1,
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MODE_SP_ELX,
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DISABLE_ALL_EXCEPTIONS);
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memset(&pnc_entry_point->args, 0, sizeof(pnc_entry_point->args));
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}
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/*******************************************************************************
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* This function takes an SP context pointer and:
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* 1. Applies the S-EL1 system register context from pnc_ctx->cpu_ctx.
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* 2. Saves the current C runtime state (callee saved registers) on the stack
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* frame and saves a reference to this state.
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* 3. Calls el3_exit() so that the EL3 system and general purpose registers
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* from the pnc_ctx->cpu_ctx are used to enter the secure payload image.
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******************************************************************************/
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uint64_t pncd_synchronous_sp_entry(pnc_context_t *pnc_ctx)
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{
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assert(pnc_ctx != NULL);
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assert(pnc_ctx->c_rt_ctx == 0U);
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/* Apply the Secure EL1 system register context and switch to it */
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assert(cm_get_context(SECURE) == &pnc_ctx->cpu_ctx);
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cm_el1_sysregs_context_restore(SECURE);
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#if CTX_INCLUDE_FPREGS
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simd_ctx_restore(SECURE);
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#endif
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cm_set_next_eret_context(SECURE);
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return pncd_enter_sp(&pnc_ctx->c_rt_ctx);
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}
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/*******************************************************************************
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* This function takes an SP context pointer and:
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* 1. Saves the S-EL1 system register context tp pnc_ctx->cpu_ctx.
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* 2. Restores the current C runtime state (callee saved registers) from the
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* stack frame using the reference to this state saved in pncd_enter_sp().
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* 3. It does not need to save any general purpose or EL3 system register state
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* as the generic smc entry routine should have saved those.
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******************************************************************************/
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void pncd_synchronous_sp_exit(pnc_context_t *pnc_ctx, uint64_t ret)
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{
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assert(pnc_ctx != NULL);
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/* Save the Secure EL1 system register context */
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assert(cm_get_context(SECURE) == &pnc_ctx->cpu_ctx);
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cm_el1_sysregs_context_save(SECURE);
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#if CTX_INCLUDE_FPREGS
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simd_ctx_save(SECURE, false);
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#endif
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assert(pnc_ctx->c_rt_ctx != 0);
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pncd_exit_sp(pnc_ctx->c_rt_ctx, ret);
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/* Should never reach here */
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panic();
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}
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