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https://github.com/ARM-software/arm-trusted-firmware.git
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2fd7b230ee
Add a function to get DDRDBG peripheral IO memory base address. Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com> Change-Id: I20d14fca49528c296c1f7d49a66129d932f44e49
53 lines
1.1 KiB
C
53 lines
1.1 KiB
C
/*
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* Copyright (c) 2024, STMicroelectronics - All Rights Reserved
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef STM32MP2_PRIVATE_H
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#define STM32MP2_PRIVATE_H
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void configure_mmu(void);
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uint32_t stm32mp_syscfg_get_chip_dev_id(void);
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/* Get DDRDBG peripheral IO memory base address */
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uintptr_t stm32_ddrdbg_get_base(void);
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/* Wrappers for OTP / BSEC functions */
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static inline uint32_t stm32_otp_probe(void)
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{
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return bsec_probe();
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}
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static inline uint32_t stm32_otp_read(uint32_t *val, uint32_t otp)
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{
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return bsec_read_otp(val, otp);
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}
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static inline uint32_t stm32_otp_shadow_read(uint32_t *val, uint32_t otp)
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{
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return bsec_shadow_read_otp(val, otp);
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}
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static inline uint32_t stm32_otp_write(uint32_t val, uint32_t otp)
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{
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return bsec_write_otp(val, otp);
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}
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static inline uint32_t stm32_otp_set_sr_lock(uint32_t otp)
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{
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return bsec_set_sr_lock(otp);
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}
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static inline uint32_t stm32_otp_read_sw_lock(uint32_t otp, bool *value)
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{
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return bsec_read_sw_lock(otp, value);
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}
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static inline bool stm32_otp_is_closed_device(void)
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{
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return bsec_mode_is_closed_device();
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}
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#endif /* STM32MP2_PRIVATE_H */
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