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5565ede44a
sbsa-ref in QEMU creates clusers of 8 cores, it may create up to 512 cores in upto 64 clusters. Implement a qemu_sbsa specific topology file and increase the BL31_SIZE to accommodate the bigger table sizes. Change platform_def.h for new topology. Correct PLATFORM_CPU_PER_CLUSTER_SHIFT so plat_helpers.S calculates correct result. Signed-off-by: Graeme Gregory <graeme@nuviainc.com> Change-Id: Idc5d70394c0956b759ad2c86f9fda8f293f2cfa7
63 lines
1.9 KiB
C
63 lines
1.9 KiB
C
/*
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* Copyright (c) 2020, Nuvia Inc
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* Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <arch.h>
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#include <common/debug.h>
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#include <platform_def.h>
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#include "sbsa_private.h"
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/* The power domain tree descriptor */
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static unsigned char power_domain_tree_desc[PLATFORM_CLUSTER_COUNT + 1];
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/*******************************************************************************
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* This function returns the sbsa-ref default topology tree information.
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******************************************************************************/
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const unsigned char *plat_get_power_domain_tree_desc(void)
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{
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unsigned int i;
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power_domain_tree_desc[0] = PLATFORM_CLUSTER_COUNT;
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for (i = 0U; i < PLATFORM_CLUSTER_COUNT; i++) {
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power_domain_tree_desc[i + 1] = PLATFORM_MAX_CPUS_PER_CLUSTER;
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}
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return power_domain_tree_desc;
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}
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/*******************************************************************************
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* This function implements a part of the critical interface between the psci
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* generic layer and the platform that allows the former to query the platform
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* to convert an MPIDR to a unique linear index. An error code (-1) is returned
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* in case the MPIDR is invalid.
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******************************************************************************/
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int plat_core_pos_by_mpidr(u_register_t mpidr)
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{
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unsigned int cluster_id, cpu_id;
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mpidr &= MPIDR_AFFINITY_MASK;
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if ((mpidr & ~(MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK)) != 0U) {
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ERROR("Invalid MPIDR\n");
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return -1;
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}
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cluster_id = (mpidr >> MPIDR_AFF1_SHIFT) & MPIDR_AFFLVL_MASK;
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cpu_id = (mpidr >> MPIDR_AFF0_SHIFT) & MPIDR_AFFLVL_MASK;
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if (cluster_id >= PLATFORM_CLUSTER_COUNT) {
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ERROR("cluster_id >= PLATFORM_CLUSTER_COUNT define\n");
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return -1;
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}
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if (cpu_id >= PLATFORM_MAX_CPUS_PER_CLUSTER) {
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ERROR("cpu_id >= PLATFORM_MAX_CPUS_PER_CLUSTER define\n");
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return -1;
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}
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return plat_qemu_calc_core_pos(mpidr);
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}
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