arm-trusted-firmware/plat/nxp/soc-ls1046a
Arvind Ram Prakash 42d4d3baac refactor(build): distinguish BL2 as TF-A entry point and BL2 running at EL3
BL2_AT_EL3 is an overloaded macro which has two uses:
	1. When BL2 is entry point into TF-A(no BL1)
	2. When BL2 is running at EL3 exception level
These two scenarios are not exactly same even though first implicitly
means second to be true. To distinguish between these two use cases we
introduce new macros.
BL2_AT_EL3 is renamed to RESET_TO_BL2 to better convey both 1. and 2.
Additional macro BL2_RUNS_AT_EL3 is added to cover all scenarious where
BL2 runs at EL3 (including four world systems).

BREAKING CHANGE: BL2_AT_EL3 renamed to RESET_TO_BL2 across the
repository.

Change-Id: I477e1d0f843b44b799c216670e028fcb3509fb72
Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@arm.com>
Signed-off-by: Maksims Svecovs <maksims.svecovs@arm.com>
2023-03-15 11:43:14 +00:00
..
aarch64 refactor(build): distinguish BL2 as TF-A entry point and BL2 running at EL3 2023-03-15 11:43:14 +00:00
include feat(ls1046a): add new SoC platform ls1046a 2022-02-15 08:59:58 +08:00
ls1046afrwy feat(ls1046afrwy): add ls1046afrwy board support 2022-02-15 08:59:58 +08:00
ls1046aqds refactor(libc): clean up dependencies in libc 2022-09-22 13:23:49 +02:00
ls1046ardb feat(ls1046ardb): add ls1046ardb board support 2022-02-15 08:59:58 +08:00
soc.c fix(layerscape): unlock write access SMMU_CBn_ACTLR 2022-12-06 22:46:10 +08:00
soc.def fix(ls1046a): 4 keys secureboot failure resolved 2022-11-23 09:17:48 +08:00
soc.mk fix(layerscape): unlock write access SMMU_CBn_ACTLR 2022-12-06 22:46:10 +08:00