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https://github.com/ARM-software/arm-trusted-firmware.git
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e73c3c3a6c
Add BL31 prerequisites for the S32G274ARDB2 board to allow single-core cold boot without MMU and PSCI services. Change-Id: I8a10fd62f3cc9430083758043ea82e3803f61060 Signed-off-by: Bogdan Hamciuc <bogdan.hamciuc@nxp.com> Signed-off-by: Bogdan Roman <bogdan-gabriel.roman@nxp.com> Signed-off-by: Andra-Teodora Ilie <andra.ilie@nxp.com> Signed-off-by: Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com>
52 lines
1 KiB
C
52 lines
1 KiB
C
/*
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* Copyright 2024 NXP
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <plat/common/platform.h>
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#include <plat_helpers.h>
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const unsigned char *plat_get_power_domain_tree_desc(void)
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{
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static const unsigned char s32g_power_domain_tree_desc[] = {
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PLATFORM_SYSTEM_COUNT,
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PLATFORM_CLUSTER_COUNT,
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PLATFORM_CORE_COUNT / U(2),
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PLATFORM_CORE_COUNT / U(2),
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};
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return s32g_power_domain_tree_desc;
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}
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int plat_core_pos_by_mpidr(u_register_t mpidr)
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{
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unsigned int cluster_id, cpu_id, core_id;
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u_register_t mpidr_priv = mpidr;
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mpidr_priv &= MPIDR_AFFINITY_MASK;
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if ((mpidr_priv & ~(MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK)) != 0) {
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return -1;
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}
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cluster_id = MPIDR_AFFLVL1_VAL(mpidr_priv);
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cpu_id = MPIDR_AFFLVL0_VAL(mpidr_priv);
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if ((cluster_id >= PLATFORM_CLUSTER_COUNT) ||
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(cpu_id >= PLATFORM_MAX_CPUS_PER_CLUSTER)) {
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return -1;
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}
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core_id = s32g2_core_pos_by_mpidr(mpidr_priv);
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if (core_id >= PLATFORM_CORE_COUNT) {
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return -1;
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}
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return (int)core_id;
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}
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unsigned int plat_get_syscnt_freq2(void)
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{
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return COUNTER_FREQUENCY;
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}
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