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10b1e13bd2
In order to enable OCRAM ECC, it need to be initialized with 64-bit writes and then a write performed to address 0x0010_0534 with the value 0x0000_0008. Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com> Change-Id: Id7d4f5df65ca52f24e9251c08a75ad2006451b95
13 lines
184 B
C
13 lines
184 B
C
/*
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* Copyright 2021 NXP
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*
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*/
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#ifndef OCRAM_H
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#define OCRAM_H
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void ocram_init(uintptr_t start_addr, size_t size);
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#endif /* OCRAM_H */
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