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This patch fixes the SE clock ID being used for Tegra186 and Tegra194 SoCs. Previous assumption, that both SoCs use the same clock ID, was incorrect. Change-Id: I1ef0da5547ff2e14151b53968cad9cc78fee63bd Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
43 lines
920 B
C
43 lines
920 B
C
/*
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* Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2020, NVIDIA Corporation. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef BPMP_IPC_H
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#define BPMP_IPC_H
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#include <lib/utils_def.h>
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#include <stdbool.h>
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#include <stdint.h>
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/**
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* Currently supported reset identifiers
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*/
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#define TEGRA_RESET_ID_XUSB_PADCTL U(114)
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#define TEGRA_RESET_ID_GPCDMA U(70)
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/**
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* Function to initialise the IPC with the bpmp
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*/
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int32_t tegra_bpmp_ipc_init(void);
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/**
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* Handler to reset a module
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*/
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int32_t tegra_bpmp_ipc_reset_module(uint32_t rst_id);
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/**
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* Handler to enable clock to a module. Only SE device is
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* supported for now.
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*/
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int tegra_bpmp_ipc_enable_clock(uint32_t clk_id);
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/**
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* Handler to disable clock to a module. Only SE device is
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* supported for now.
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*/
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int tegra_bpmp_ipc_disable_clock(uint32_t clk_id);
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#endif /* BPMP_IPC_H */
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