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The ChromeOS project uses Coreboot as BL2 instead of MediaTek regular bootloader, so we use COREBOOT flag to support Coreboot boot flow. Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com> Change-Id: I45e95ea51e90158187452eba52fc58090d1c60a4
15 lines
464 B
Makefile
15 lines
464 B
Makefile
#
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# Copyright (c) 2022, MediaTek Inc. All rights reserved.
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#
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# SPDX-License-Identifier: BSD-3-Clause
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#
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# indicate the reset vector address can be programmed
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PROGRAMMABLE_RESET_ADDRESS := 1
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COLD_BOOT_SINGLE_CPU := 1
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# Build flag to include AArch32 registers in cpu context save and restore during
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# world switch. This flag must be set to 0 for AArch64-only platforms.
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CTX_INCLUDE_AARCH32_REGS := 0
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PLAT_XLAT_TABLES_DYNAMIC := 1
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VENDOR_EXTEND_PUBEVENT_ENABLE := 1
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