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108146ce73
Building the default upstream configuration for the imx8mq-evk is no longer
possible: The linker will complain that the TF-A image will no longer
fit On-Chip SRAM.
In order to make the i.MX8MQ Image buildable again, let's make the DRAM
retention feature optional: It was added in v2.9 and it's possible to
boot the systems without it. Users that make space elsewhere and wish to
enable it can use the newly introduced IMX_DRAM_RETENTION parameter to
configure it. The parameter is added to all i.MX8M variants, but only
for i.MX8MQ, we disable it by default, as that's the one that currently
has binary size problems.
Change-Id: I714f8ea96f18154db02390ba500f4a2dc5329ee7
Fixes: dd108c3c1f ("feat(imx8mq): add the dram retention support for imx8mq")
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
95 lines
2.6 KiB
Makefile
95 lines
2.6 KiB
Makefile
#
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# Copyright 2019-2022 NXP
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#
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# SPDX-License-Identifier: BSD-3-Clause
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#
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PLAT_INCLUDES := -Iplat/imx/common/include \
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-Iplat/imx/imx8m/include \
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-Iplat/imx/imx8m/imx8mn/include
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# Translation tables library
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include lib/xlat_tables_v2/xlat_tables.mk
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# Include GICv3 driver files
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include drivers/arm/gic/v3/gicv3.mk
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IMX_DRAM_SOURCES := plat/imx/imx8m/ddr/dram.c \
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plat/imx/imx8m/ddr/clock.c \
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plat/imx/imx8m/ddr/dram_retention.c \
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plat/imx/imx8m/ddr/ddr4_dvfs.c \
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plat/imx/imx8m/ddr/lpddr4_dvfs.c
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IMX_GIC_SOURCES := ${GICV3_SOURCES} \
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plat/common/plat_gicv3.c \
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plat/common/plat_psci_common.c \
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plat/imx/common/plat_imx8_gic.c
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BL31_SOURCES += common/desc_image_load.c \
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plat/imx/common/imx8_helpers.S \
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plat/imx/imx8m/gpc_common.c \
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plat/imx/imx8m/imx_hab.c \
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plat/imx/imx8m/imx_aipstz.c \
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plat/imx/imx8m/imx_rdc.c \
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plat/imx/imx8m/imx8m_caam.c \
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plat/imx/imx8m/imx8m_ccm.c \
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plat/imx/imx8m/imx8m_csu.c \
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plat/imx/imx8m/imx8m_psci_common.c \
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plat/imx/imx8m/imx8m_snvs.c \
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plat/imx/imx8m/imx8mn/imx8mn_bl31_setup.c \
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plat/imx/imx8m/imx8mn/imx8mn_psci.c \
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plat/imx/imx8m/imx8mn/gpc.c \
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plat/imx/common/imx8_topology.c \
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plat/imx/common/imx_sip_handler.c \
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plat/imx/common/imx_sip_svc.c \
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plat/imx/common/imx_common.c \
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plat/imx/common/imx_uart_console.S \
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lib/cpus/aarch64/cortex_a53.S \
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drivers/arm/tzc/tzc380.c \
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drivers/delay_timer/delay_timer.c \
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drivers/delay_timer/generic_delay_timer.c \
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${IMX_GIC_SOURCES} \
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${XLAT_TABLES_LIB_SRCS}
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ENABLE_PIE := 1
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USE_COHERENT_MEM := 1
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RESET_TO_BL31 := 1
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A53_DISABLE_NON_TEMPORAL_HINT := 0
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ERRATA_A53_835769 := 1
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ERRATA_A53_843419 := 1
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ERRATA_A53_855873 := 1
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IMX_DRAM_RETENTION ?= 1
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$(eval $(call assert_boolean,IMX_DRAM_RETENTION))
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$(eval $(call add_define,IMX_DRAM_RETENTION))
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ifeq (${IMX_DRAM_RETENTION},1)
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BL31_SOURCES += ${IMX_DRAM_SOURCES}
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endif
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ifneq (${PRELOADED_BL33_BASE},)
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$(eval $(call add_define_val,PLAT_NS_IMAGE_OFFSET,${PRELOADED_BL33_BASE}))
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endif
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BL32_BASE ?= 0xbe000000
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$(eval $(call add_define,BL32_BASE))
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BL32_SIZE ?= 0x2000000
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$(eval $(call add_define,BL32_SIZE))
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IMX_BOOT_UART_BASE ?= 0x30890000
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ifeq (${IMX_BOOT_UART_BASE},auto)
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override IMX_BOOT_UART_BASE := 0
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endif
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$(eval $(call add_define,IMX_BOOT_UART_BASE))
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EL3_EXCEPTION_HANDLING := $(SDEI_SUPPORT)
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ifeq (${SDEI_SUPPORT}, 1)
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BL31_SOURCES += plat/imx/common/imx_ehf.c \
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plat/imx/common/imx_sdei.c
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endif
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ifeq (${SPD},trusty)
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BL31_CFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC=1
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endif
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