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https://github.com/ARM-software/arm-trusted-firmware.git
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4ed1676518
For platforms that have two or more TZC400 controllers instantiated, allow the TZC400 driver to be usable with all those instances. This is achieved by allowing 'arm_tzc400_setup' function to accept the base address of the TZC400 controller. Change-Id: I4add470e6ddb58432cd066145e644112400ab924 Signed-off-by: Suyash Pathak <suyash.pathak@arm.com>
79 lines
2.1 KiB
C
79 lines
2.1 KiB
C
/*
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* Copyright (c) 2014-2020, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <platform_def.h>
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#include <common/debug.h>
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#include <drivers/arm/tzc400.h>
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#include <plat/arm/common/plat_arm.h>
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/* Weak definitions may be overridden in specific ARM standard platform */
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#pragma weak plat_arm_security_setup
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/*******************************************************************************
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* Initialize the TrustZone Controller for ARM standard platforms.
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* When booting an EL3 payload, this is simplified: we configure region 0 with
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* secure access only and do not enable any other region.
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******************************************************************************/
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void arm_tzc400_setup(uintptr_t tzc_base,
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const arm_tzc_regions_info_t *tzc_regions)
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{
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#ifndef EL3_PAYLOAD_BASE
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unsigned int region_index = 1U;
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const arm_tzc_regions_info_t *p;
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const arm_tzc_regions_info_t init_tzc_regions[] = {
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ARM_TZC_REGIONS_DEF,
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{0}
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};
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#endif
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INFO("Configuring TrustZone Controller\n");
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tzc400_init(tzc_base);
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/* Disable filters. */
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tzc400_disable_filters();
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#ifndef EL3_PAYLOAD_BASE
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if (tzc_regions == NULL)
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p = init_tzc_regions;
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else
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p = tzc_regions;
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/* Region 0 set to no access by default */
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tzc400_configure_region0(TZC_REGION_S_NONE, 0);
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/* Rest Regions set according to tzc_regions array */
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for (; p->base != 0ULL; p++) {
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tzc400_configure_region(PLAT_ARM_TZC_FILTERS, region_index,
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p->base, p->end, p->sec_attr, p->nsaid_permissions);
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region_index++;
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}
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INFO("Total %u regions set.\n", region_index);
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#else /* if defined(EL3_PAYLOAD_BASE) */
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/* Allow Secure and Non-secure access to DRAM for EL3 payloads */
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tzc400_configure_region0(TZC_REGION_S_RDWR, PLAT_ARM_TZC_NS_DEV_ACCESS);
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#endif /* EL3_PAYLOAD_BASE */
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/*
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* Raise an exception if a NS device tries to access secure memory
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* TODO: Add interrupt handling support.
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*/
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tzc400_set_action(TZC_ACTION_ERR);
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/* Enable filters. */
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tzc400_enable_filters();
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}
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void plat_arm_security_setup(void)
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{
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arm_tzc400_setup(PLAT_ARM_TZC_BASE, NULL);
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}
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