mirror of
https://github.com/ARM-software/arm-trusted-firmware.git
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973e0b7f2c
This commit introduces a new ARM platform-specific build option called `ARM_FW_CONFIG_LOAD_ENABLE`. This option enables the loading of the `fw_config` device tree when resetting to the BL2 scenario. Additionally, the FW_CONFIG image reference has been added to the fdts/tbbr_cot_descriptors.dtsi file in order to use in the scenario of RESET_TO_BL2. Signed-off-by: Divin Raj <divin.raj@arm.com> Change-Id: I11de497b7dbb1386ed84d939d6fd2a11856e9e1b
150 lines
4 KiB
C
150 lines
4 KiB
C
/*
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* Copyright (c) 2017-2024, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <assert.h>
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#include <drivers/generic_delay_timer.h>
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#include <drivers/partition/partition.h>
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#include <lib/fconf/fconf.h>
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#include <lib/fconf/fconf_dyn_cfg_getter.h>
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#include <plat/arm/common/plat_arm.h>
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#include <plat/common/platform.h>
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#include <platform_def.h>
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#pragma weak bl2_el3_early_platform_setup
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#pragma weak bl2_el3_plat_arch_setup
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#pragma weak bl2_el3_plat_prepare_exit
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#define MAP_BL2_EL3_TOTAL MAP_REGION_FLAT( \
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bl2_el3_tzram_layout.total_base, \
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bl2_el3_tzram_layout.total_size, \
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MT_MEMORY | MT_RW | MT_SECURE)
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static meminfo_t bl2_el3_tzram_layout;
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/*
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* Perform arm specific early platform setup. At this moment we only initialize
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* the console and the memory layout.
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*/
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void arm_bl2_el3_early_platform_setup(void)
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{
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/* Initialize the console to provide early debug support */
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arm_console_boot_init();
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/*
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* Allow BL2 to see the whole Trusted RAM. This is determined
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* statically since we cannot rely on BL1 passing this information
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* in the RESET_TO_BL2 case.
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*/
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bl2_el3_tzram_layout.total_base = ARM_BL_RAM_BASE;
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bl2_el3_tzram_layout.total_size = ARM_BL_RAM_SIZE;
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/* Initialise the IO layer and register platform IO devices */
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plat_arm_io_setup();
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}
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void bl2_el3_early_platform_setup(u_register_t arg0 __unused,
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u_register_t arg1 __unused,
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u_register_t arg2 __unused,
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u_register_t arg3 __unused)
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{
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arm_bl2_el3_early_platform_setup();
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/*
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* Initialize Interconnect for this cluster during cold boot.
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* No need for locks as no other CPU is active.
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*/
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plat_arm_interconnect_init();
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/*
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* Enable Interconnect coherency for the primary CPU's cluster.
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*/
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plat_arm_interconnect_enter_coherency();
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generic_delay_timer_init();
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}
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#if ARM_FW_CONFIG_LOAD_ENABLE
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/*************************************************************************************
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* FW CONFIG load function for BL2 when RESET_TO_BL2=1 && ARM_FW_CONFIG_LOAD_ENABLE=1
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*************************************************************************************/
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void arm_bl2_el3_plat_config_load(void)
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{
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int ret;
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const struct dyn_cfg_dtb_info_t *fw_config_info;
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/* Set global DTB info for fixed fw_config information */
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set_config_info(PLAT_FW_CONFIG_BASE, ~0UL, PLAT_FW_CONFIG_MAX_SIZE, FW_CONFIG_ID);
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/* Fill the device tree information struct with the info from the config dtb */
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ret = fconf_load_config(FW_CONFIG_ID);
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if (ret < 0) {
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ERROR("Loading of FW_CONFIG failed %d\n", ret);
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plat_error_handler(ret);
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}
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/*
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* FW_CONFIG loaded successfully. Check the FW_CONFIG device tree parsing
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* is successful.
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*/
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fw_config_info = FCONF_GET_PROPERTY(dyn_cfg, dtb, FW_CONFIG_ID);
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if (fw_config_info == NULL) {
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ret = -1;
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ERROR("Invalid FW_CONFIG address\n");
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plat_error_handler(ret);
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}
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ret = fconf_populate_dtb_registry(fw_config_info->config_addr);
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if (ret < 0) {
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ERROR("Parsing of FW_CONFIG failed %d\n", ret);
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plat_error_handler(ret);
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}
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}
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#endif /* ARM_FW_CONFIG_LOAD_ENABLE */
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/*******************************************************************************
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* Perform the very early platform specific architectural setup here. At the
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* moment this is only initializes the mmu in a quick and dirty way.
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******************************************************************************/
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void arm_bl2_el3_plat_arch_setup(void)
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{
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#if USE_COHERENT_MEM
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/* Ensure ARM platforms dont use coherent memory
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* in RESET_TO_BL2
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*/
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assert(BL_COHERENT_RAM_END - BL_COHERENT_RAM_BASE == 0U);
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#endif
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const mmap_region_t bl_regions[] = {
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MAP_BL2_EL3_TOTAL,
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ARM_MAP_BL_RO,
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{0}
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};
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setup_page_tables(bl_regions, plat_arm_get_mmap());
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#ifdef __aarch64__
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enable_mmu_el3(0);
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#else
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enable_mmu_svc_mon(0);
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#endif
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}
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void bl2_el3_plat_arch_setup(void)
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{
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int __maybe_unused ret;
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arm_bl2_el3_plat_arch_setup();
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#if ARM_GPT_SUPPORT
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ret = gpt_partition_init();
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if (ret != 0) {
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ERROR("GPT partition initialisation failed!\n");
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panic();
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}
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#endif /* ARM_GPT_SUPPORT */
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}
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void bl2_el3_plat_prepare_exit(void)
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{
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}
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