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https://github.com/ARM-software/arm-trusted-firmware.git
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e343bf1384
Point boot address to DDR location for booting A5DS FPGA FIP, Kernel and rootfs are sideloaded to DDR Also move BL2 to higher address in DDR Change-Id: Ia2a57a0bda776a1a0a96bcd3cfb5c6cd2cf4dc04 Signed-off-by: Avinash Mehta <avinash.mehta@arm.com>
56 lines
1 KiB
C
56 lines
1 KiB
C
/*
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* Copyright (c) 2019-2020, Arm Limited. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <assert.h>
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#include <common/debug.h>
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#include <lib/mmio.h>
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#include <platform_def.h>
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#include <plat/arm/common/arm_config.h>
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#include <plat/arm/common/plat_arm.h>
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#define MAP_PERIPHBASE MAP_REGION_FLAT(PERIPHBASE,\
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PERIPH_SIZE,\
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MT_DEVICE | MT_RW | MT_SECURE)
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#define MAP_A5_PERIPHERALS MAP_REGION_FLAT(A5_PERIPHERALS_BASE,\
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A5_PERIPHERALS_SIZE,\
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MT_DEVICE | MT_RW | MT_SECURE)
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#ifdef IMAGE_BL1
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const mmap_region_t plat_arm_mmap[] = {
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ARM_MAP_SHARED_RAM,
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MAP_PERIPHBASE,
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MAP_A5_PERIPHERALS,
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MAP_BOOT_RW,
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{0}
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};
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#endif
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#ifdef IMAGE_BL2
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const mmap_region_t plat_arm_mmap[] = {
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ARM_MAP_SHARED_RAM,
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MAP_PERIPHBASE,
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MAP_A5_PERIPHERALS,
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MAP_BOOT_RW,
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ARM_MAP_NS_DRAM1,
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{0}
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};
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#endif
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#ifdef IMAGE_BL32
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const mmap_region_t plat_arm_mmap[] = {
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ARM_MAP_SHARED_RAM,
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MAP_PERIPHBASE,
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MAP_A5_PERIPHERALS,
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{0}
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};
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#endif
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ARM_CASSERT_MMAP
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unsigned int plat_get_syscnt_freq2(void)
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{
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return A5DS_TIMER_BASE_FREQUENCY;
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}
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