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49d98cd549
The H6 has a "secure port controller" similar to the A64/H5, but with more ports and a different register layout. Split the platform-specific parts out into a header, and add the missing MMIO base address. Signed-off-by: Samuel Holland <samuel@sholland.org> Change-Id: I3703868bc595459ecf9568b9d1605cb1be014bf5
40 lines
1.1 KiB
C
40 lines
1.1 KiB
C
/*
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* Copyright (c) 2017-2020, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <common/debug.h>
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#include <lib/mmio.h>
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#include <sunxi_ccu.h>
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#include <sunxi_mmap.h>
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#include <sunxi_private.h>
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#include <sunxi_spc.h>
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#define DMA_SEC_REG 0x20
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/*
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* Setup the peripherals to be accessible by non-secure world.
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* This will not work for the Secure Peripherals Controller (SPC) unless
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* a fuse it burnt (seems to be an erratum), but we do it nevertheless,
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* to allow booting on boards using secure boot.
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*/
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void sunxi_security_setup(void)
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{
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int i;
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INFO("Configuring SPC Controller\n");
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/* SPC setup: set all devices to non-secure */
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for (i = 0; i < SUNXI_SPC_NUM_PORTS; i++)
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mmio_write_32(SUNXI_SPC_DECPORT_SET_REG(i), 0xffffffff);
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/* set MBUS clocks, bus clocks (AXI/AHB/APB) and PLLs to non-secure */
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mmio_write_32(SUNXI_CCU_SEC_SWITCH_REG, 0x7);
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/* Set R_PRCM bus clocks to non-secure */
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mmio_write_32(SUNXI_R_PRCM_SEC_SWITCH_REG, 0x1);
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/* Set all DMA channels (16 max.) to non-secure */
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mmio_write_32(SUNXI_DMA_BASE + DMA_SEC_REG, 0xffff);
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}
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