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79629b1a79
Add driver to support DDR on STM32MP2 platform. It drives the DDR PHY and its firmware, as well as the DDR controller. Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com> Signed-off-by: Maxime Méré <maxime.mere@foss.st.com> Change-Id: I93de2db1b9378d5654e76b3bf6f3407d80bc4ca5
35 lines
875 B
C
35 lines
875 B
C
/*
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* Copyright (c) 2024, STMicroelectronics - All Rights Reserved
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef STM32MP2_DDR_HELPERS_H
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#define STM32MP2_DDR_HELPERS_H
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#include <stdbool.h>
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#include <stdint.h>
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#include <drivers/st/stm32mp2_ddr_regs.h>
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enum stm32mp2_ddr_sr_mode {
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DDR_SR_MODE_INVALID = 0,
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DDR_SSR_MODE,
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DDR_HSR_MODE,
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DDR_ASR_MODE,
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};
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void ddr_activate_controller(struct stm32mp_ddrctl *ctl, bool sr_entry);
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void ddr_wait_lp3_mode(bool state);
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int ddr_sr_exit_loop(void);
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uint32_t ddr_get_io_calibration_val(void);
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int ddr_sr_entry(bool standby);
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int ddr_sr_exit(void);
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enum stm32mp2_ddr_sr_mode ddr_read_sr_mode(void);
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void ddr_set_sr_mode(enum stm32mp2_ddr_sr_mode mode);
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void ddr_save_sr_mode(void);
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void ddr_restore_sr_mode(void);
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void ddr_sub_system_clk_init(void);
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void ddr_sub_system_clk_off(void);
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#endif /* STM32MP2_DDR_HELPERS_H */
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