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Add driver to support DDR on STM32MP2 platform. It drives the DDR PHY and its firmware, as well as the DDR controller. Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com> Signed-off-by: Maxime Méré <maxime.mere@foss.st.com> Change-Id: I93de2db1b9378d5654e76b3bf6f3407d80bc4ca5
163 lines
5 KiB
C
163 lines
5 KiB
C
/*
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* Copyright (C) 2022-2024, STMicroelectronics - All Rights Reserved
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <common/debug.h>
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#include <drivers/st/stm32mp_ddr_test.h>
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#include <lib/mmio.h>
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#include <platform_def.h>
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#ifdef __aarch64__
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#define DDR_PATTERN 0xAAAAAAAAAAAAAAAAUL
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#define DDR_ANTIPATTERN 0x5555555555555555UL
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#else /* !__aarch64__ */
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#define DDR_PATTERN 0xAAAAAAAAU
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#define DDR_ANTIPATTERN 0x55555555U
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#endif /* __aarch64__ */
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static void mmio_write_pattern(uintptr_t addr, u_register_t value)
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{
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#ifdef __aarch64__
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mmio_write_64(addr, (uint64_t)value);
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#else /* !__aarch64__ */
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mmio_write_32(addr, (uint32_t)value);
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#endif /* __aarch64__ */
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}
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static u_register_t mmio_read_pattern(uintptr_t addr)
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{
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#ifdef __aarch64__
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return (u_register_t)mmio_read_64(addr);
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#else /* !__aarch64__ */
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return (u_register_t)mmio_read_32(addr);
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#endif /* __aarch64__ */
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}
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/*******************************************************************************
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* This function tests a simple read/write access to the DDR.
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* Note that the previous content is restored after test.
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* Returns 0 if success, and address value else.
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******************************************************************************/
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uintptr_t stm32mp_ddr_test_rw_access(void)
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{
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u_register_t saved_value = mmio_read_pattern(STM32MP_DDR_BASE);
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mmio_write_pattern(STM32MP_DDR_BASE, DDR_PATTERN);
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if (mmio_read_pattern(STM32MP_DDR_BASE) != DDR_PATTERN) {
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return STM32MP_DDR_BASE;
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}
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mmio_write_pattern(STM32MP_DDR_BASE, saved_value);
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return 0UL;
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}
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/*******************************************************************************
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* This function tests the DDR data bus wiring.
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* This is inspired from the Data Bus Test algorithm written by Michael Barr
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* in "Programming Embedded Systems in C and C++" book.
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* resources.oreilly.com/examples/9781565923546/blob/master/Chapter6/
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* File: memtest.c - This source code belongs to Public Domain.
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* Returns 0 if success, and address value else.
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******************************************************************************/
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uintptr_t stm32mp_ddr_test_data_bus(void)
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{
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u_register_t pattern;
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for (pattern = 1U; pattern != 0U; pattern <<= 1U) {
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mmio_write_pattern(STM32MP_DDR_BASE, pattern);
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if (mmio_read_pattern(STM32MP_DDR_BASE) != pattern) {
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return STM32MP_DDR_BASE;
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}
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}
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return 0UL;
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}
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/*******************************************************************************
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* This function tests the DDR address bus wiring.
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* This is inspired from the Data Bus Test algorithm written by Michael Barr
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* in "Programming Embedded Systems in C and C++" book.
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* resources.oreilly.com/examples/9781565923546/blob/master/Chapter6/
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* File: memtest.c - This source code belongs to Public Domain.
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* size: size in bytes of the DDR memory device.
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* Returns 0 if success, and address value else.
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******************************************************************************/
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uintptr_t stm32mp_ddr_test_addr_bus(size_t size)
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{
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size_t addressmask = size - 1U;
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size_t offset;
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size_t testoffset = 0U;
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/* Write the default pattern at each of the power-of-two offsets. */
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for (offset = sizeof(u_register_t); (offset & addressmask) != 0U;
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offset <<= 1U) {
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mmio_write_pattern(STM32MP_DDR_BASE + offset, DDR_PATTERN);
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}
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/* Check for address bits stuck high. */
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mmio_write_pattern(STM32MP_DDR_BASE + testoffset, DDR_ANTIPATTERN);
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for (offset = sizeof(u_register_t); (offset & addressmask) != 0U;
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offset <<= 1U) {
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if (mmio_read_pattern(STM32MP_DDR_BASE + offset) != DDR_PATTERN) {
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return STM32MP_DDR_BASE + offset;
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}
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}
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mmio_write_pattern(STM32MP_DDR_BASE + testoffset, DDR_PATTERN);
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/* Check for address bits stuck low or shorted. */
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for (testoffset = sizeof(u_register_t); (testoffset & addressmask) != 0U;
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testoffset <<= 1U) {
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mmio_write_pattern(STM32MP_DDR_BASE + testoffset, DDR_ANTIPATTERN);
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if (mmio_read_pattern(STM32MP_DDR_BASE) != DDR_PATTERN) {
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return STM32MP_DDR_BASE;
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}
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for (offset = sizeof(u_register_t); (offset & addressmask) != 0U;
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offset <<= 1U) {
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if ((mmio_read_pattern(STM32MP_DDR_BASE + offset) != DDR_PATTERN) &&
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(offset != testoffset)) {
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return STM32MP_DDR_BASE + offset;
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}
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}
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mmio_write_pattern(STM32MP_DDR_BASE + testoffset, DDR_PATTERN);
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}
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return 0UL;
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}
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/*******************************************************************************
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* This function checks the DDR size. It has to be run with Data Cache off.
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* This test is run before data have been put in DDR, and is only done for
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* cold boot. The DDR data can then be overwritten, and it is not useful to
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* restore its content.
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* Returns DDR computed size.
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******************************************************************************/
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size_t stm32mp_ddr_check_size(void)
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{
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size_t offset = sizeof(u_register_t);
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mmio_write_pattern(STM32MP_DDR_BASE, DDR_PATTERN);
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while (offset < STM32MP_DDR_MAX_SIZE) {
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mmio_write_pattern(STM32MP_DDR_BASE + offset, DDR_ANTIPATTERN);
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dsb();
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if (mmio_read_pattern(STM32MP_DDR_BASE) != DDR_PATTERN) {
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break;
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}
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offset <<= 1U;
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}
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return offset;
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}
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