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76f735fd82
CCN API(s) to be used NXP SoC(s) are added. These API(s) based on ARM CCN driver - driver/arm/ccn CCI API(s) to be used NXP SoC(s) are added. These API(s) based on ARM CCI driver - driver/arm/cci Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com> Change-Id: I7682c4c9bd42f63542b3ffd3cb6c5d2effe4ae0a
31 lines
954 B
C
31 lines
954 B
C
/*
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* Copyright 2020 NXP
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*
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*/
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#include <arch.h>
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#include <ccn.h>
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#include <plat_arm.h>
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/******************************************************************************
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* Helper function to place current master into coherency
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*****************************************************************************/
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void plat_ls_interconnect_enter_coherency(unsigned int num_clusters)
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{
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ccn_enter_snoop_dvm_domain(1ULL << MPIDR_AFFLVL1_VAL(read_mpidr_el1()));
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for (uint32_t index = 1U; index < num_clusters; index++) {
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ccn_enter_snoop_dvm_domain(1ULL << index);
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}
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}
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/******************************************************************************
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* Helper function to remove current master from coherency
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*****************************************************************************/
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void plat_ls_interconnect_exit_coherency(void)
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{
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ccn_exit_snoop_dvm_domain(1ULL << MPIDR_AFFLVL1_VAL(read_mpidr_el1()));
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}
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