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![]() In the SMMU root port programming model, changing both SMMU_ROOT_CR0.GPCEN and ACCESSEN bits in the same MMIO write operation is permitted by the architecture but left to the SMMU IP implementation to determine the order of completing one or the other operation. Enforce more determinism by setting CR0.GPCEN, wait for CR0ACK.GPCEN completion, then setting CR0.ACCESSEN and wait for CR0ACK.ACCESSEN completion. Signed-off-by: Olivier Deprez <olivier.deprez@arm.com> Change-Id: I36ba5fbc13d06c6243226008d18a2d57477b0d28 |
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smmu_v3.c |