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MHUv3 reworks parts of MHUv2 and introduces MHU extensions. There are currently 3 extensions: * Doorbell extension: which works like MHUv2 * FIFO extension: which uses a buffer for faster inband data transfer * Fastchannel extension: for fast data transfer Add MHUv3 driver with support for Doorbell extension for both postbox sender MHUs and mailbox receiver MHUs. Signed-off-by: Aziz IDOMAR <aziz.idomar@arm.com> Signed-off-by: Sayanta Pattanayak <sayanta.pattanayak@arm.com> Signed-off-by: Shriram K <shriram.k@arm.com> Signed-off-by: Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com> Signed-off-by: Joel Goddard <joel.goddard@arm.com> Change-Id: Icf49df56f1159f4c9830e0ffcda5b3a4bea8d2fd
222 lines
7.4 KiB
C
222 lines
7.4 KiB
C
/*
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* Copyright (c) 2024, Arm Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef MHU_V3_X_PRIVATE_H
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#define MHU_V3_X_PRIVATE_H
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#include <stdint.h>
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/* Flag for PDBCW Interrupt Transfer Acknowledgment */
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#define MHU_V3_X_PDBCW_INT_X_TFR_ACK 0x1
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/* Flag for PDBCW CTRL Postbox combined interrupts enable */
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#define MHU_V3_X_PDBCW_CTRL_PBX_COMB_EN 0x1
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/* Flag for MDBCW CTRL Mailbox combined interrupts enable */
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#define MHU_V3_X_MDBCW_CTRL_MBX_COMB_EN 0x1
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/**
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* Postbox control page structure
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*/
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struct _mhu_v3_x_pbx_ctrl_reg_t {
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/* Offset: 0x000 (R/ ) Postbox Block Identifier */
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const volatile uint32_t pbx_blk_id;
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/* Offset: 0x004 (R/ ) Reserved */
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const volatile uint8_t reserved_0[0x10 - 0x04];
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/* Offset: 0x010 (R/ ) Postbox Feature Support 0 */
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const volatile uint32_t pbx_feat_spt0;
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/* Offset: 0x014 (R/ ) Postbox Feature Support 1 */
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const volatile uint32_t pbx_feat_spt1;
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/* Offset: 0x018 (R/ ) Reserved */
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const volatile uint8_t reserved_1[0x20 - 0x18];
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/* Offset: 0x020 (R/ ) Postbox Doorbell Channel Configuration 0 */
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const volatile uint32_t pbx_dbch_cfg0;
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/* Offset: 0x024 (R/ ) Reserved */
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const volatile uint8_t reserved_2[0x30 - 0x24];
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/* Offset: 0x030 (R/ ) Postbox FIFO Channel Configuration 0 */
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const volatile uint32_t pbx_ffch_cfg0;
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/* Offset: 0x034 (R/ ) Reserved */
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const volatile uint8_t reserved_3[0x40 - 0x34];
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/* Offset: 0x040 (R/ ) Postbox Fast Channel Configuration 0 */
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const volatile uint32_t pbx_fch_cfg0;
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/* Offset: 0x044 (R/ ) Reserved */
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const volatile uint8_t reserved_4[0x100 - 0x44];
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/* Offset: 0x100 (R/W) Postbox control */
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volatile uint32_t pbx_ctrl;
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/* Offset: 0x164 (R/ ) Reserved */
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const volatile uint8_t reserved_5[0x400 - 0x104];
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/*
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* Offset: 0x400 (R/ ) Postbox Doorbell Channel Interrupt Status n,
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* where n is 0 - 3.
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*/
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const volatile uint32_t pbx_dbch_int_st[4];
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/*
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* Offset: 0x410 (R/ ) Postbox FIFO Channel <n> Interrupt Status n,
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* where n is 0 - 1.
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*/
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const volatile uint32_t pbx_ffch_int_st[2];
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/* Offset: 0x418 (R/ ) Reserved */
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const uint8_t reserved_6[0xFC8 - 0x418];
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/* Offset: 0xFC8 (R/ ) Postbox Implementer Identification Register */
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const volatile uint32_t pbx_iidr;
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/* Offset: 0xFCC (R/ ) Postbox Architecture Identification Register */
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const volatile uint32_t pbx_aidr;
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/*
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* Offset: 0xFD0 (R/ ) Postbox Implementation Defined Identification
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* Register n, where n is 0 - 11.
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*/
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const volatile uint32_t impl_def_id[12];
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};
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/**
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* Postbox doorbell channel window page structure
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*/
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struct _mhu_v3_x_pdbcw_reg_t {
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/* Offset: 0x000 (R/ ) Postbox Doorbell Channel Window Status */
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const volatile uint32_t pdbcw_st;
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/* Offset: 0x004 (R/ ) Reserved */
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const uint8_t reserved_0[0xC - 0x4];
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/* Offset: 0x00C ( /W) Postbox Doorbell Channel Window Set */
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volatile uint32_t pdbcw_set;
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/*
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* Offset: 0x010 (R/ ) Postbox Doorbell Channel Window Interrupt Status
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*/
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const volatile uint32_t pdbcw_int_st;
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/*
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* Offset: 0x014 ( /W) Postbox Doorbell Channel Window Interrupt Clear
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*/
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volatile uint32_t pdbcw_int_clr;
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/*
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* Offset: 0x018 (R/W) Postbox Doorbell Channel Window Interrupt Enable
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*/
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volatile uint32_t pdbcw_int_en;
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/* Offset: 0x01C (R/W) Postbox Doorbell Channel Window Control */
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volatile uint32_t pdbcw_ctrl;
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};
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/**
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* Postbox structure
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*/
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struct _mhu_v3_x_pbx {
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/* Postbox Control */
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struct _mhu_v3_x_pbx_ctrl_reg_t pbx_ctrl_page;
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/* Postbox Doorbell Channel Window */
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struct _mhu_v3_x_pdbcw_reg_t pdbcw_page;
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};
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/**
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* Mailbox control page structure
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*/
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struct _mhu_v3_x_mbx_ctrl_reg_t {
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/* Offset: 0x000 (R/ ) Mailbox Block Identifier */
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const volatile uint32_t mbx_blk_id;
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/* Offset: 0x004 (R/ ) Reserved */
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const volatile uint8_t reserved_0[0x10 - 0x04];
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/* Offset: 0x010 (R/ ) Mailbox Feature Support 0 */
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const volatile uint32_t mbx_feat_spt0;
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/* Offset: 0x014 (R/ ) Mailbox Feature Support 1 */
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const volatile uint32_t mbx_feat_spt1;
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/* Offset: 0x018 (R/ ) Reserved */
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const volatile uint8_t reserved_1[0x20 - 0x18];
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/* Offset: 0x020 (R/ ) Mailbox Doorbell Channel Configuration 0 */
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const volatile uint32_t mbx_dbch_cfg0;
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/* Offset: 0x024 (R/ ) Reserved */
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const volatile uint8_t reserved_2[0x30 - 0x24];
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/* Offset: 0x030 (R/ ) Mailbox FIFO Channel Configuration 0 */
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const volatile uint32_t mbx_ffch_cfg0;
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/* Offset: 0x034 (R/ ) Reserved */
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const volatile uint8_t reserved_4[0x40 - 0x34];
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/* Offset: 0x040 (R/ ) Mailbox Fast Channel Configuration 0 */
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const volatile uint32_t mbx_fch_cfg0;
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/* Offset: 0x044 (R/ ) Reserved */
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const volatile uint8_t reserved_5[0x100 - 0x44];
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/* Offset: 0x100 (R/W) Mailbox control */
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volatile uint32_t mbx_ctrl;
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/* Offset: 0x104 (R/ ) Reserved */
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const volatile uint8_t reserved_6[0x140 - 0x104];
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/* Offset: 0x140 (R/W) Mailbox Fast Channel control */
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volatile uint32_t mbx_fch_ctrl;
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/* Offset: 0x144 (R/W) Mailbox Fast Channel Group Interrupt Enable */
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volatile uint32_t mbx_fcg_int_en;
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/* Offset: 0x148 (R/ ) Reserved */
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const volatile uint8_t reserved_7[0x400 - 0x148];
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/*
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* Offset: 0x400 (R/ ) Mailbox Doorbell Channel Interrupt Status n,
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* where n = 0 - 3.
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*/
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const volatile uint32_t mbx_dbch_int_st[4];
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/*
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* Offset: 0x410 (R/ ) Mailbox FIFO Channel Interrupt Status n, where
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* n = 0 - 1.
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*/
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const volatile uint32_t mbx_ffch_int_st[2];
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/* Offset: 0x418 (R/ ) Reserved */
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const volatile uint8_t reserved_8[0x470 - 0x418];
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/* Offset: 0x470 (R/ ) Mailbox Fast Channel Group Interrupt Status */
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const volatile uint32_t mbx_fcg_int_st;
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/* Offset: 0x474 (R/ ) Reserved */
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const volatile uint8_t reserved_9[0x480 - 0x474];
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/*
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* Offset: 0x480 (R/ ) Mailbox Fast Channel Group <n> Interrupt Status,
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* where n = 0 - 31.
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*/
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const volatile uint32_t mbx_fch_grp_int_st[32];
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/* Offset: 0x500 (R/ ) Reserved */
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const volatile uint8_t reserved_10[0xFC8 - 0x500];
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/* Offset: 0xFC8 (R/ ) Mailbox Implementer Identification Register */
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const volatile uint32_t mbx_iidr;
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/* Offset: 0xFCC (R/ ) Mailbox Architecture Identification Register */
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const volatile uint32_t mbx_aidr;
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/*
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* Offset: 0xFD0 (R/ ) Mailbox Implementation Defined Identification
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* Register n, where n is 0 - 11.
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*/
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const volatile uint32_t impl_def_id[12];
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};
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/**
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* Mailbox doorbell channel window page structure
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*/
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struct _mhu_v3_x_mdbcw_reg_t {
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/* Offset: 0x000 (R/ ) Mailbox Doorbell Channel Window Status */
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const volatile uint32_t mdbcw_st;
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/* Offset: 0x004 (R/ ) Mailbox Doorbell Channel Window Status Masked */
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const volatile uint32_t mdbcw_st_msk;
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/* Offset: 0x008 ( /W) Mailbox Doorbell Channel Window Clear */
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volatile uint32_t mdbcw_clr;
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/* Offset: 0x00C (R/ ) Reserved */
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const volatile uint8_t reserved_0[0x10 - 0x0C];
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/* Offset: 0x010 (R/ ) Mailbox Doorbell Channel Window Mask Status */
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const volatile uint32_t mdbcw_msk_st;
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/* Offset: 0x014 ( /W) Mailbox Doorbell Channel Window Mask Set */
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volatile uint32_t mdbcw_msk_set;
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/* Offset: 0x018 ( /W) Mailbox Doorbell Channel Window Mask Clear */
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volatile uint32_t mdbcw_msk_clr;
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/* Offset: 0x01C (R/W) Mailbox Doorbell Channel Window Control */
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volatile uint32_t mdbcw_ctrl;
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};
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/**
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* Mailbox structure
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*/
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struct _mhu_v3_x_mbx {
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/* Mailbox control */
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struct _mhu_v3_x_mbx_ctrl_reg_t mbx_ctrl_page;
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/* Mailbox Doorbell Channel Window */
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struct _mhu_v3_x_mdbcw_reg_t mdbcw_page;
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};
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/**
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* MHUv3 frame type
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*/
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union _mhu_v3_x_frame_t {
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/* Postbox Frame */
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struct _mhu_v3_x_pbx pbx_frame;
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/* Mailbox Frame */
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struct _mhu_v3_x_mbx mbx_frame;
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};
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#endif /* MHU_V3_X_PRIVATE_H */
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