Marek Behún c9f138ebfe fix(drivers/marvell/comphy-3700): fix PIN_PU_IVREF register name ... According to Functional Specification, the register at bit 1 of PHY Configuration 1 is called PIN_PU_IVREF, not PIN_PU_IVEREF. Fix this. Signed-off-by: Marek Behún <marek.behun@nic.cz> Change-Id: I912fa4a1956bf0b1b35a24925db03e3dbbe1adf3		2021-12-09 01:28:36 +01:00
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comphy	fix(drivers/marvell/comphy-3700): fix PIN_PU_IVREF register name	2021-12-09 01:28:36 +01:00
mc_trustzone	fix: libc: use long for 64-bit types on aarch64	2021-11-08 14:41:17 +00:00
mg_conf_cm3	drivers: marvell: mg_conf_cm3: pass comphy lane number to AP FW	2020-07-10 10:55:09 +00:00
mochi	drivers/marvell: check if TRNG unit is present	2021-04-20 13:00:16 +02:00
secure_dfx_access	drivers: marvell: misc-dfx: extend dfx whitelist	2021-04-20 12:59:45 +02:00
uart	fix(plat/marvell/a3720/uart): do external reset during initialization	2021-12-02 17:38:02 +01:00
amb_adec.c	fix: libc: use long for 64-bit types on aarch64	2021-11-08 14:41:17 +00:00
ap807_clocks_init.c	ble: ap807: improve PLL configuration sequence	2020-06-07 00:06:03 +02:00
cache_llc.c	drivers: marvell: Fix the LLC SRAM driver	2020-07-10 10:55:33 +00:00
ccu.c	fix: libc: use long for 64-bit types on aarch64	2021-11-08 14:41:17 +00:00
comphy.h	Standardise header guards across codebase	2018-11-08 10:20:19 +00:00
ddr_phy_access.c	ddr_phy: use smc calls to access ddr phy registers	2021-04-20 12:59:34 +02:00
ddr_phy_access.h	ddr_phy: use smc calls to access ddr phy registers	2021-04-20 12:59:34 +02:00
gwin.c	fix: libc: use long for 64-bit types on aarch64	2021-11-08 14:41:17 +00:00
io_win.c	fix: libc: use long for 64-bit types on aarch64	2021-11-08 14:41:17 +00:00
iob.c	fix: libc: use long for 64-bit types on aarch64	2021-11-08 14:41:17 +00:00
mci.c	plat: marvell: mci: perform mci link tuning for all mci interfaces	2020-06-07 00:06:03 +02:00
thermal.c	Sanitise includes across codebase	2019-01-04 10:43:17 +00:00