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https://github.com/ARM-software/arm-trusted-firmware.git
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c97857dba2
New SoC is a78 based with gicv3 and uart over pl011. Communication interfaces are similar to Versal NET platform. System starts with AMD PLM firmware which loads TF-A(bl31) to memory, which is already configured, and jumps to it. PLM also prepare handoff structure for TF-A with information what components were load and flags which indicate which EL level SW should be started. Change-Id: I5065b1b7ec4ee58e77dc4096747758480c84009c Signed-off-by: Amit Nagal <amit.nagal@amd.com> Signed-off-by: Akshay Belsare <akshay.belsare@amd.com> Signed-off-by: Michal Simek <michal.simek@amd.com>
73 lines
1.4 KiB
C
73 lines
1.4 KiB
C
/*
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* Copyright (c) 2022, Xilinx, Inc. All rights reserved.
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* Copyright (c) 2022-2024, Advanced Micro Devices, Inc. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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/*
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* SoC IPI agent registers access management
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*/
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#include <lib/utils_def.h>
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#include <plat_ipi.h>
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/* versal2 ipi configuration table */
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static const struct ipi_config ipi_table[IPI_ID_MAX] = {
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/* A78 IPI */
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[IPI_ID_APU] = {
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.ipi_bit_mask = IPI0_TRIG_BIT,
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.ipi_reg_base = IPI0_REG_BASE,
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.secure_only = 0,
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},
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/* PMC IPI */
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[IPI_ID_PMC] = {
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.ipi_bit_mask = PMC_IPI_TRIG_BIT,
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.ipi_reg_base = IPI0_REG_BASE,
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.secure_only = IPI_SECURE_MASK,
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},
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/* RPU0 IPI */
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[IPI_ID_RPU0] = {
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.ipi_bit_mask = IPI1_TRIG_BIT,
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.ipi_reg_base = IPI1_REG_BASE,
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.secure_only = 0,
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},
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/* RPU1 IPI */
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[IPI_ID_RPU1] = {
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.ipi_bit_mask = IPI2_TRIG_BIT,
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.ipi_reg_base = IPI2_REG_BASE,
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.secure_only = 0,
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},
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/* IPI3 IPI */
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[IPI_ID_3] = {
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.ipi_bit_mask = IPI3_TRIG_BIT,
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.ipi_reg_base = IPI3_REG_BASE,
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.secure_only = 0,
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},
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/* IPI4 IPI */
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[IPI_ID_4] = {
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.ipi_bit_mask = IPI4_TRIG_BIT,
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.ipi_reg_base = IPI4_REG_BASE,
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.secure_only = 0,
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},
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/* IPI5 IPI */
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[IPI_ID_5] = {
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.ipi_bit_mask = IPI5_TRIG_BIT,
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.ipi_reg_base = IPI5_REG_BASE,
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.secure_only = 0,
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},
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};
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/**
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* soc_ipi_config_table_init() - Initialize versal2 IPI configuration data.
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*/
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void soc_ipi_config_table_init(void)
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{
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ipi_config_table_init(ipi_table, ARRAY_SIZE(ipi_table));
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}
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