Arunachalam Ganapathy 68ac5ed049 fix(el3_runtime): fix SVE and AMU extension enablement flags ... If SVE are enabled for both Non-secure and Secure world along with AMU extension, then it causes the TAM_BIT in CPTR_EL3 to be set upon exit from bl31. This restricts access to the AMU register set in normal world. This fix maintains consistency in both TAM_BIT and CPTR_EZ_BIT by saving and restoring CPTR_EL3 register from EL3 context. Signed-off-by: Arunachalam Ganapathy <arunachalam.ganapathy@arm.com> Change-Id: Id76ce1d27ee48bed65eb32392036377716aff087		2021-07-23 10:33:59 +01:00
..
amu	fix(el3_runtime): fix SVE and AMU extension enablement flags	2021-07-23 10:33:59 +01:00
mpam	TF-A: Fix wrong register read for MPAM extension	2020-05-26 15:39:52 +00:00
mtpmu	Add support for FEAT_MTPMU for Armv8.6	2020-12-11 12:49:20 +00:00
pauth	TF-A: Add support for ARMv8.3-PAuth in BL1 SMC calls and BL2U	2019-10-03 14:43:55 +01:00
ras	lib/extensions/ras: fix bug of binary search	2021-01-14 09:27:16 +08:00
spe	SPE: Fix feature detection	2020-09-14 18:00:18 +01:00
sve	fix(el3_runtime): fix SVE and AMU extension enablement flags	2021-07-23 10:33:59 +01:00